Erasing cortex m3 based (edited) via SWD-Interface@1000kHz 
Erase Thread started.
Device "cortex m3 based (edited)" selected.
Found SW-DP with ID 0x2BA01477
Scanning APs, stopping at first AHB-AP found.
AP[0] IDR: 0x24770011 (AHB-AP)
AHB-AP ROM: 0xE00FF000 (Base addr. of first ROM table)
CPUID reg: 0x412FC230. Implementer code: 0x41 (ARM)
Found Cortex-M3 r2p0, Little endian.
FPUnit: 6 code (BP) slots and 2 literal slots
CoreSight components:
ROMTbl[0] @ E00FF000
ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 002BB000 SCS
ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 002BB002 DWT
ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 002BB003 FPB
ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 002BB001 ITM
ROMTbl[0][4]: E0040000, CID: B105900D, PID: 002BB923 TPIU-Lite
ROMTbl[0][5]: E0041000, CID: B105900D, PID: 002BB924 ETM-M3
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.VECTRESET.
Debugger initialized successfully.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.VECTRESET.
Reset: VECTRESET has confused core.
Reset: Failed. Toggling reset pin and trying reset strategy again.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.VECTRESET.
Reset: CPU may have not been reset (DHCSR.S_RESET_ST never gets set).
DAP error while reading DP-Ctrl-Stat register.
CPU could not be halted
Can not read register 16 (XPSR) while CPU is running
Can not read register 20 (CFBP) while CPU is running
Can not read register 0 (R0) while CPU is running
Can not read register 1 (R1) while CPU is running
Can not read register 2 (R2) while CPU is running
Can not read register 3 (R3) while CPU is running
Can not read register 4 (R4) while CPU is running
Can not read register 5 (R5) while CPU is running
Can not read register 6 (R6) while CPU is running
Can not read register 7 (R7) while CPU is running
Can not read register 8 (R8) while CPU is running
Can not read register 9 (R9) while CPU is running
Can not read register 10 (R10) while CPU is running
Can not read register 11 (R11) while CPU is running
Can not read register 12 (R12) while CPU is running
Can not read register 14 (R14) while CPU is running
Can not read register 15 (R15) while CPU is running
Can not read register 17 (MSP) while CPU is running
Can not read register 18 (PSP) while CPU is running
Failed to download RAMCode.
Failed to prepare for programming.
Failed to download RAMCode!
Erase Thread exited 
Erase failed.