Tue Jan 29, 2019 15:19:51: IAR Embedded Workbench 8.32.2 (C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\bin\armproc.dll) 
Tue Jan 29, 2019 15:19:51: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\config\debugger\ST\STM32G0xx.dmac 
Tue Jan 29, 2019 15:19:51: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\config\flashloader\ST\FlashSTM32G0xxx.mac 
Tue Jan 29, 2019 15:19:51: JLINK command: ProjectFile = C:\Users\zli\Desktop\2019-01-29_STM32G07\2019-01-29_STM32G07\settings\test_Debug.jlink, return = 0 
Tue Jan 29, 2019 15:19:51: Device "STM32G071CB" selected. 
Tue Jan 29, 2019 15:19:51: DLL version: V6.40b, compiled Jan 22 2019 11:30:15 
Tue Jan 29, 2019 15:19:51: Firmware: J-Link V10 compiled Jan  7 2019 14:00:10 
Tue Jan 29, 2019 15:19:51: Selecting SWD as current target interface. 
Tue Jan 29, 2019 15:19:51: JTAG speed is initially set to: 1000 kHz 
Tue Jan 29, 2019 15:19:51: Found SW-DP with ID 0x0BC11477 
Tue Jan 29, 2019 15:19:51: Scanning AP map to find all available APs 
Tue Jan 29, 2019 15:19:51: AP[1]: Stopped AP scan as end of AP map has been reached 
Tue Jan 29, 2019 15:19:51: AP[0]: AHB-AP (IDR: 0x04770031) 
Tue Jan 29, 2019 15:19:51: Iterating through AP map to find AHB-AP to use 
Tue Jan 29, 2019 15:19:51: AP[0]: Core found 
Tue Jan 29, 2019 15:19:51: AP[0]: AHB-AP ROM base: 0xF0000000 
Tue Jan 29, 2019 15:19:51: CPUID register: 0x410CC601. Implementer code: 0x41 (ARM) 
Tue Jan 29, 2019 15:19:51: Found Cortex-M0 r0p1, Little endian. 
Tue Jan 29, 2019 15:19:51: FPUnit: 4 code (BP) slots and 0 literal slots 
Tue Jan 29, 2019 15:19:51: CoreSight components: 
Tue Jan 29, 2019 15:19:51: ROMTbl[0] @ F0000000 
Tue Jan 29, 2019 15:19:51: ROMTbl[0][0]: E00FF000, CID: B105100D, PID: 000BB4C0 ROM Table 
Tue Jan 29, 2019 15:19:51: ROMTbl[1] @ E00FF000 
Tue Jan 29, 2019 15:19:51: ROMTbl[1][0]: E000E000, CID: B105E00D, PID: 000BB008 SCS 
Tue Jan 29, 2019 15:19:51: ROMTbl[1][1]: E0001000, CID: B105E00D, PID: 000BB00A DWT 
Tue Jan 29, 2019 15:19:51: ROMTbl[1][2]: E0002000, CID: B105E00D, PID: 000BB00B FPB 
Tue Jan 29, 2019 15:19:51: Reset: Halt core after reset via DEMCR.VC_CORERESET. 
Tue Jan 29, 2019 15:19:51: Reset: Reset device via AIRCR.SYSRESETREQ. 
Tue Jan 29, 2019 15:19:51: Hardware reset with strategy 0 was performed 
Tue Jan 29, 2019 15:19:51: Initial reset was performed 
Tue Jan 29, 2019 15:19:51: DMAC: Freez the Watchdog timers when the core is halted 
Tue Jan 29, 2019 15:19:51: 976 bytes downloaded and verified (20.28 Kbytes/sec) 
Tue Jan 29, 2019 15:19:51: Loaded debugee: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\config\flashloader\ST\FlashSTM32G0xxx_RAM32KB.out 
Tue Jan 29, 2019 15:19:51: Target reset 
Tue Jan 29, 2019 15:19:51: Unloaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\config\flashloader\ST\FlashSTM32G0xxx.mac 
Tue Jan 29, 2019 15:19:51: Downloaded C:\Users\zli\Desktop\2019-01-29_STM32G07\2019-01-29_STM32G07\Debug\Exe\test.out to flash memory. 
Tue Jan 29, 2019 15:19:51: 156 bytes downloaded into FLASH (0.30 Kbytes/sec) 
Tue Jan 29, 2019 15:19:51: Reset: Halt core after reset via DEMCR.VC_CORERESET. 
Tue Jan 29, 2019 15:19:51: Reset: Reset device via AIRCR.SYSRESETREQ. 
Tue Jan 29, 2019 15:19:51: Hardware reset with strategy 0 was performed 
Tue Jan 29, 2019 15:19:51: 156 bytes downloaded into FLASH and verified (0.70 Kbytes/sec) 
Tue Jan 29, 2019 15:19:51: Loaded debugee: C:\Users\zli\Desktop\2019-01-29_STM32G07\2019-01-29_STM32G07\Debug\Exe\test.out 
Tue Jan 29, 2019 15:19:51: Reset: Halt core after reset via DEMCR.VC_CORERESET. 
Tue Jan 29, 2019 15:19:51: Reset: Reset device via AIRCR.SYSRESETREQ. 
Tue Jan 29, 2019 15:19:51: Hardware reset with strategy 0 was performed 
Tue Jan 29, 2019 15:19:51: Target reset 
Tue Jan 29, 2019 15:19:59: IAR Embedded Workbench 8.32.2 (C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.2\arm\bin\armproc.dll)