C:\Program Files (x86)\SEGGER\JLink_V614>jlink -Device IMX537 -Speed 100 -AutoConnect 1 -JTAGConf -1,-1 SEGGER J-Link Commander V6.14 (Compiled Feb 23 2017 17:30:02) DLL version V6.14, compiled Feb 23 2017 17:29:32 Connecting to J-Link via USB...O.K. Firmware: J-Link V10 compiled Jan 9 2017 17:48:51 Hardware version: V10.10 S/N: 600103286 License(s): RDI, FlashBP, FlashDL, JFlash, GDB VTref = 1.793V Device "IMX537" selected. TotalIRLen = 13, IRPrint = 0x0101 ************************** WARNING: At least one of the connected devices is not JTAG compliant (IEEE Std 1149.1, 7.1.1.d, IR-cells). (NumDevices = 3, NumBitsS et = 2) ************************** TotalIRLen = 13, IRPrint = 0x0101 ************************** WARNING: At least one of the connected devices is not JTAG compliant (IEEE Std 1149.1, 7.1.1.d, IR-cells). (NumDevices = 3, NumBitsS et = 2) ************************** ****** Error: Communication error when trying to read IDR of AP[0]. Got -1 as response. TotalIRLen = 13, IRPrint = 0x0101 ************************** WARNING: At least one of the connected devices is not JTAG compliant (IEEE Std 1149.1, 7.1.1.d, IR-cells). (NumDevices = 3, NumBitsS et = 2) ************************** TotalIRLen = 13, IRPrint = 0x0101 ************************** WARNING: At least one of the connected devices is not JTAG compliant (IEEE Std 1149.1, 7.1.1.d, IR-cells). (NumDevices = 3, NumBitsS et = 2) ************************** Cannot connect to target. J-Link>exit C:\Program Files (x86)\SEGGER\JLink_V614>jlink -Device IMX537 -Speed 100 -AutoConnect 1 -JTAGConf -1,-1 SEGGER J-Link Commander V6.14 (Compiled Feb 23 2017 17:30:02) DLL version V6.14, compiled Feb 23 2017 17:29:32 Connecting to J-Link via USB...O.K. Firmware: J-Link V10 compiled Jan 9 2017 17:48:51 Hardware version: V10.10 S/N: 600103286 License(s): RDI, FlashBP, FlashDL, JFlash, GDB VTref = 1.792V Device "IMX537" selected. TotalIRLen = 13, IRPrint = 0x0101 ************************** WARNING: At least one of the connected devices is not JTAG compliant (IEEE Std 1149.1, 7.1.1.d, IR-cells). (NumDev et = 2) ************************** ARM AP[0]: 0x44770001, AHB-AP ARM AP[1]: 0x24770002, APB-AP ROMTbl 0 [0]: 00001003, CID: B105900D, PID:04-000BB907 ETB ROMTbl 0 [1]: 00002003, CID: B105900D, PID:04-104BB921 ROMTbl 0 [2]: 00003003, CID: B105900D, PID:04-004BB912 TPIU ROMTbl 0 [3]: 00004003, CID: B105900D, PID:04-104BB922 ROMTbl 0 [4]: 00005003, CID: B105900D, PID:04-000BB906 ECT / CTI ROMTbl 0 [5]: 00006003, CID: B105900D, PID:04-003BB906 ECT / CTI ROMTbl 0 [6]: 00007003, CID: B105900D, PID:04-003BB906 ECT / CTI ROMTbl 0 [7]: 00008003, CID: B105900D, PID:04-104BBC08 Cortex-A8 Found Cortex-A8 r2p5 6 code breakpoints, 2 data breakpoints Debug architecture ARMv7.0 Data endian: little Main ID register: 0x412FC085 I-Cache L1: 32 KB, 128 Sets, 64 Bytes/Line, 4-Way D-Cache L1: 32 KB, 128 Sets, 64 Bytes/Line, 4-Way Unified-Cache L2: 256 KB, 512 Sets, 64 Bytes/Line, 8-Way System control register: Instruction endian: little Level-1 instruction cache enabled Level-1 data cache enabled MMU disabled Branch prediction enabled Found 3 JTAG devices, Total IRLen = 13: #0 Id: 0x1BA00477, IRLen: 04, IRPrint: 0x1, CoreSight JTAG-DP (ARM) #1 Id: 0x00000001 #2 Id: 0x1190D01D Cortex-A8 identified. J-Link>h PC: (R15) = 7780B24C, CPSR = 800001D3 (SVC mode, ARM FIQ dis. IRQ dis.) Current: R0 =70A4E200, R1 =00001271, R2 =00000022, R3 =00000080 R4 =50004000, R5 =00000200, R6 =2DE4058D, R7 =775DF7D8 R8 =7780B254, R9 =7780B254, R10=775E081C, R11=70800000, R12=00000800 R13=00002800, R14=00002800, SPSR=775DF7A0 USR: R8 =775E081C, R9 =70800000, R10=00000800, R11=00002800, R12=00002800 R13=359EDA48, R14=2BC49044 FIQ: R8 =3479FBEF, R9 =EE937F2E, R10=EDB7FED4, R11=85AEB63B, R12=4EC377FC R13=2420BDFC, R14=B7B7E7BE, SPSR=00000000 IRQ: R13=808A2480, R14=8040AA40, SPSR=00000000 SVC: R13=775DF7A0, R14=7780B12C, SPSR=00000000 ABT: R13=808A248C, R14=8040AC40, SPSR=00000000 UND: R13=808A2498, R14=8040AD40, SPSR=00000000 J-Link> J-Link>g J-Link>h ************************** WARNING: CPU could not be halted ************************** J-Link>h ************************** WARNING: CPU could not be halted ************************** J-Link>g ****** Error: CPU is not halted J-Link>h ************************** WARNING: CPU could not be halted ************************** J-Link>r Reset delay: 0 ms Reset type NORMAL: Toggle reset pin and halt CPU core. ************************** WARNING: CPU not halted after Reset, halting using Halt request ************************** J-Link>h PC: (R15) = 77810DF0, CPSR = 600001D3 (SVC mode, ARM FIQ dis. IRQ dis.) Current: R0 =775DFE14, R1 =53FBCFFF, R2 =0000000A, R3 =0000006C R4 =775DFE14, R5 =00000002, R6 =77800840, R7 =F801FF8C R8 =77810DF8, R9 =77810DF8, R10=775E081C, R11=00000000, R12=00000000 R13=00000000, R14=00000020, SPSR=775DFE10 USR: R8 =775E081C, R9 =00000000, R10=00000000, R11=00000000, R12=00000020 R13=00000000, R14=00000000 FIQ: R8 =3479FBEF, R9 =EE937F2E, R10=EDB7FED4, R11=85AEB63B, R12=4EC377FC R13=2420BDFC, R14=B7B7E7BE, SPSR=00000000 IRQ: R13=808A2480, R14=8040AA40, SPSR=00000000 SVC: R13=775DFE10, R14=77817C64, SPSR=00000000 ABT: R13=808A248C, R14=8040AEE0, SPSR=00000000 UND: R13=808A2498, R14=8040AD40, SPSR=00000000 J-Link>exit ****** Error: Bad JTAG communication: Write to IR: Expected 0x1, got 0xF (TAP Command : 10) @ Off 0x5.