It appears that I can debug firmware using J-Link and IAR Embedded Workbench on an ARM Cortex-M3, or run Altera's Signal Tap (a logic analyzer tool) on an FPGA connected to the ARM, but not both at the same time. If the USB Blaster / Signal Tap combination are armed (awaiting trigger condition), and I try to step or even just tell the ARM to run, the J-Link connection acts as if the target was not attached. J-Link driver version is 2.65 on a Win7 64-bit host. Observations, comments and suggestions are greatly appreciated!