How to make J-Link tristate the SWCLK and SWDIO lines when idle

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  • How to make J-Link tristate the SWCLK and SWDIO lines when idle

    Hello. I can successfully program my chip (an STM32) using the J-Link, but when I am done programming the chip I would like the J-Link to fully release it by making SWCLK (pin 9), SWDIO (pin 7), and RESET (pin 15) all be inputs.

    I did some experiments and it seems that the J-Link is always driving SWCLK high and SWDIO low whenever there is 3.3 V present on VTref (pin 1) when the device is idle. Is this the expected behavior of the J-Link? Is there an easy way for me to make SWCLK, SWDIO, and RESET all be inputs?

    The only work-around I know of is to disconnect VTref, and that could work for me, but it is not ideal because it adds another manual step to my production process. Ideally, you could tell me a command that I can run in my jlink script to tri-state those lines.

    Thanks!