flashing STM with remapped JTAG

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  • flashing STM with remapped JTAG

    Hello,

    I have J-Link connected to a STM32 evaluation board. Everything looks fine. The board is flashable as often as I like to flash. As soon as I flash software which disables the STM's JTAG interface by remapping the appropriating pins to its alternative function, I get the problem that the STM seams to be no longer flashable.
    This J-Link ARM V3.90d Error windowpops up: "Could not find supported CPU core on JTAG chain".
    I expected that J-Link uses the strategy "connect under reset" per default what should make a switched off JTAG available again. I did not find an opportunity to set or change the connect strategy but I'm afraid I have to. The logging Segger J-Link ARM V3.90d control panel just tells this:
    SEGGER J-Link ARM V3.90d DLL Log
    DLL Compiled: Sep 1 2008 13:56:39
    Logging started @ 2010-05-31 11:49

    T0964 000:031 JLINKARM_Halt()


    best regards
    Stefan
  • Hi Stefan,

    did you try the latest release / beta version, too?
    In the last versions we improved the J-Link Reset behavior,
    so this might be an old problem which is already fixed in the new version.

    Latest release: segger.com/download_jlink.html
    Latest beta: segger.com/download_jlink_beta.html


    Best regards
    Alex
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
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  • RE: flashing STM with remapped JTAG

    Hi Alex,

    thank you for the links to the download region. I tried the newest beta. The result is still the same. Perhaps this helps more.I got this message:

    Could not find supported CPU core on JTAG chain
    Bad JTAG communication: Write IR: Expected 0x1, got 0x0 (TAP Command : 2) @ Off 0x5.
    Unable to halt ARM core
    Failed to connect


    The log window of this tool showed this:
    Connecting ...
    - Connecting via USB to J-Link device 0
    - J-Link firmware: V1.20 (J-Link ARM V7 compiled Jun 30 2009 11:05:27)
    - JTAG speed: 5 kHz (Fixed)
    - Initializing CPU core (Init sequence) ...
    -
    ERROR: Failed to connect


    If I have software in the STM (different evaluation board) which does not remap the JTAG I see this in the log window:
    Connecting ...
    - Connecting via USB to J-Link device 0
    - J-Link firmware: V1.20 (J-Link ARM V7 compiled Jun 30 2009 11:05:27)
    - JTAG speed: 5 kHz (Fixed)
    - Initializing CPU core (Init sequence) ...
    - Initialized successfully
    - JTAG speed: 1000 kHz (Auto)
    - J-Link found 2 JTAG devices. Core ID: 0x3BA00477 (Cortex-M3)
    -
    Connected successfully


    I setup the initialization sequence to
    0 Reset 0 0ms
    I also tried this
    0 Reset 0 10ms
    and
    0 Reset 0 0ms
    1 Halt


    I hope these information can help more.

    best regards
    Stefan

    The post was edited 2 times, last by stefanbytec ().