Wednesday, April 25th 2018, 10:17pm UTC+2

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apullin

Beginner

Date of registration: Mar 31st 2010

Posts: 26

1

Saturday, April 7th 2018, 12:52pm

[SOLVED] RTT, TI-RTOS, CC13xx, OS_GetBASEPRI/OS_SetBASEPRI ?

Does anyone over there at Segger have an implementation for RTT that is known to work with TI-RTOS? The documentation for TI-RTOS is a total hellstorm, so if someone at Segger has already solved this, that would be *super* useful.

I am just now trying to put together a project where a CC13xx is used as a coprocessor, and having RTT would be VERY helpful, due to there only being a single UART on the CC1310.
However, when I try to build RTT out-of-the-box, I get an unresolved symbol error for OS_GetBASEPRI / OS_SetBASEPRI. I am not sure where these should be implemented?

When I used RTT previously on an STM32/ThreadX system, everything worked without any modifications. It looks like the GCC config doesn't actually do any chip-level or OS level priority fiddling ... but, again, it worked fine in my previous application.

SEGGER - Nino

Super Moderator

Date of registration: Jan 2nd 2017

Posts: 956

2

Thursday, April 12th 2018, 2:59pm

Hello,

Thank you for your inquiry.
Unfortunately we do not have a working RTT implementation for TI-RTOS otherwise we would make it available on our website.
We had a customer in the past asking for such a setup as well but looking through TI documentation a Port was rather complex and due to low demand it was not implemented by us.

Best regards,
Nino
Please read the forum rules before posting: Forum Rules

Keep in mind, this is not a support forum. Its main purposes is user to user interaction.
Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
Should you be entitled to support contact us per e-mail.
The following contact form can be used for this: https://www.segger.com/about-us/contact-us/


apullin

Beginner

Date of registration: Mar 31st 2010

Posts: 26

3

Friday, April 20th 2018, 7:52am

workaround

OK, as a follow-up:

I just added a subsection to the #ifdef __TI_ARM__ section that uses the trivial defines from the bottom of the file:





p.p1 {margin: 0.0px 0.0px 0.0px 0.0px; font: 11.0px Monaco} span.s1 {color: #931a68}


#define SEGGER_RTT_LOCK()

#define SEGGER_RTT_UNLOCK()


which does work, tested on actual CC1310 silicon running debug from CCS w/ JLink.
This is with the understanding that it will not be thread or multi-stream safe.
But it works for stream 0, which is all I needed to exfiltrate some simple data from this board.

SEGGER - Nino

Super Moderator

Date of registration: Jan 2nd 2017

Posts: 956

4

Friday, April 20th 2018, 9:35am

Hello,

Thank you for providing additional information for a barebone setup.
We will consider this thread now as solved.

Best regards,
Nino
Please read the forum rules before posting: Forum Rules

Keep in mind, this is not a support forum. Its main purposes is user to user interaction.
Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
Should you be entitled to support contact us per e-mail.
The following contact form can be used for this: https://www.segger.com/about-us/contact-us/