[SOLVED] Problems connecting to CC3220SF via J-Link

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  • [SOLVED] Problems connecting to CC3220SF via J-Link

    Hello!
    I am currently working on a custom design with CC3220S or CC3220SF chip from TI. Currently debugging works under TI's IDE (CCS) with their XDS110 debug probe. We would prefer to use the J-Link, but currenly I am having problems connecting to the unit. Directly within CCS will result in a not very desriptive error message (runJLinkCommand: ERROR: Failed to set device."

    I manage to connect to the core with JLinkExe, but this is slightly unreliable -- it works if I switch intermittently to SWD and then back. Any idea what I should do to get this more reliable (or at least JLinkGDBServer to launch reliably?)

    $ JLinkGDBServer -device CC3220SF
    ...
    Checking target voltage...
    Target voltage: 3.33 V
    Listening on TCP/IP port 2331
    Connecting to target...WARNING: Single device found in JTAG chain, but configuration has DRPost = 1, IRPost = 6. These values must be 0 for a single device and will be ignored.
    ERROR: CPU-TAP not found in JTAG chain
    ERROR: Could not connect to target.
    Target connection failed. GDBServer will be closed...Restoring target state and closing J-Link connection...
    Shutting down...
    Could not connect to target.
    Please check power, connection and settings.%


    With JLinkExe I can get a connection, but this only after some manual twiddling:

    convergens@cvgvmtmpubu:...project/cc3220/sources% JLinkExe -device CC3220SF -if JTAG
    SEGGER J-Link Commander V6.30f (Compiled Mar 2 2018 17:30:55)
    DLL version V6.30f, compiled Mar 2 2018 17:30:48

    Connecting to J-Link via USB...O.K.
    Firmware: J-Link V10 compiled Mar 2 2018 17:07:17
    Hardware version: V10.10
    S/N: 600100729
    License(s): RDI, FlashBP, FlashDL, JFlash, GDB
    VTref = 3.327V


    Type "connect" to establish a target connection, '?' for help
    J-Link>connect
    Device position in JTAG chain (IRPre,DRPre) <Default>: -1,-1 => Auto-detect
    JTAGConf>
    Specify target interface speed [kHz]. <Default>: 4000 kHz
    Speed>
    Device "CC3220SF" selected.


    Connecting to target via JTAG
    ICEPick IDCODE: 0x0B97C02F
    TotalIRLen = 6, IRPrint = 0x01

    **************************
    WARNING:
    Single device found in JTAG chain, but configuration has DRPost = 1,
    IRPost = 6. These values must be 0 for a single device and will be
    ignored.
    **************************

    JTAG chain detection found 1 devices:
    #0 Id: 0x0B97C02F, IRLen: 06, TI ICEPick
    ICEPick IDCODE: 0x00000000
    Cannot read DAP IDCODE. Expected 0xXXXXX477, read: 0x00000000
    TotalIRLen = ?, IRPrint = 0x..000000000000000000000000
    ICEPick IDCODE: 0x00000000
    Cannot read DAP IDCODE. Expected 0xXXXXX477, read: 0x00000000
    TotalIRLen = ?, IRPrint = 0x..000000000000000000000000

    ****** Error: CPU-TAP not found in JTAG chain
    ICEPick IDCODE: 0x00000000
    Cannot read DAP IDCODE. Expected 0xXXXXX477, read: 0x00000000
    TotalIRLen = ?, IRPrint = 0x..000000000000000000000000
    ICEPick IDCODE: 0x00000000
    Cannot read DAP IDCODE. Expected 0xXXXXX477, read: 0x00000000
    TotalIRLen = ?, IRPrint = 0x..000000000000000000000000
    Cannot connect to target.
    J-Link>if swd
    Selecting SWD as current target interface.
    J-Link>connect
    Device "CC3220SF" selected.




    *** J-Link V6.30f Error ***
    Second debugger connection to the same J-Link detected.
    J-Link currently uses target interface JTAG while current debugger tries to select target interface SWD.
    Should interface be changed?
    *** J-Link V6.30f Error ***

    Connecting to target via SWD
    ERROR: Cannot connect to target device
    ERROR: Cannot connect to target device
    ERROR: Cannot connect to target device
    ERROR: Cannot connect to target device
    Cannot connect to target.
    J-Link>if jtag
    Selecting JTAG as current target interface.
    J-Link>connect
    Device "CC3220SF" selected.




    *** J-Link V6.30f Error ***
    Second debugger connection to the same J-Link detected.
    J-Link currently uses target interface SWD while current debugger tries to select target interface JTAG.
    Should interface be changed?
    *** J-Link V6.30f Error ***

    Connecting to target via JTAG
    ICEPick IDCODE: 0x0B97C02F
    TotalIRLen = 10, IRPrint = 0x0011
    JTAG chain detection found 2 devices:
    #0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
    #1 Id: 0x0B97C02F, IRLen: 06, TI ICEPick
    AP map detection skipped. Manually configured AP map found.
    AP[0]: AHB-AP (IDR: Not set)
    AP[0]: Core found
    AP[0]: AHB-AP ROM base: 0xE00FF000
    CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
    Found Cortex-M4 r0p1, Little endian.
    FPUnit: 6 code (BP) slots and 2 literal slots
    CoreSight components:
    ROMTbl[0] @ E00FF000
    ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 000BB000 SCS
    ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 003BB002 DWT
    ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 002BB003 FPB
    ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 003BB001 ITM
    ROMTbl[0][4]: E0040000, CID: B105900D, PID: 000BB9A1 TPIU
    ROMTbl[0][5]: E0041000, CID: B105900D, PID: 000BB925 ETM
    Cortex-M4 identified.
    J-Link>
  • Hello,

    Thank you for your inquiry.
    We tested the setup with a CC3220SF-LAUNCHXL eval board and were able to reproduce the issue you were seeing.
    We will investigate this further and see if this needs to be fixed from our side or if it is a hardware bug.

    Is there a particular reason for you to be using JTAG instead of SWD?
    As a current workaround we suggest using SWD instead as it seems to be working reliably with that target device.
    So simply set the GDBServer to use SWD and you should be good to go.

    Best regards,
    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hello!

    Thanks. I cannot really make the initial connection work under SWD either (6.30f) I assume the IcePick (TI's jtag interconnection) can only be configured in JTAG mode initially, and the default debug state is in JTAG for the design (SOP pins configuration, this is a custom design with SOP[0] low.)

    So no, real reason, except that "JTAG works with the XDS110" -- I have been out of luck with getting the J-Link to connect to (without twiddling) it directly from CCS (TI's IDE) or otherwise. Never has really worked with SWD, which I would prefer otherwise.

    Is there something special (SOP settings or program) to verify to make SWD work (as said, the XDS work, so debugging isn't locked out on the chip!)
  • Hello,

    The statement "XDS works" will not help us as it is well possible that special connect sequences are needed and the target device does not meet the standard SWD/JTAG specification.
    XDS only needs to support a handfull of TI chips which makes special sequences easy to implement. J-Link needs to be able to support over 9000 different devices, subfamilies and special cases and all that without breaking all other devices while adding a new one.

    The CC3220SF-LAUNCHXL does work with J-Link and SWD. So we suggest to compare that design with your custom design and see if there are any differences, because at least SWD should be working at this point in time.
    For verification we suggest using J-Link Commander: wiki.segger.com/J-Link_cannot_…ty_using_J-Link_Commander

    Best regards,
    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • jaska wrote:

    Hello!

    Thanks. I cannot really make the initial connection work under SWD either (6.30f) I assume the IcePick (TI's jtag interconnection) can only be configured in JTAG mode initially, and the default debug state is in JTAG for the design (SOP pins configuration, this is a custom design with SOP[0] low.)

    So no, real reason, except that "JTAG works with the XDS110" -- I have been out of luck with getting the J-Link to connect to (without twiddling) it directly from CCS (TI's IDE) or otherwise. Never has really worked with SWD, which I would prefer otherwise.

    Is there something special (SOP settings or program) to verify to make SWD work (as said, the XDS work, so debugging isn't locked out on the chip!)
    [offtopic]

    Small world Jaakko. Trying to get rid of the XDS I see. :D


    [/offtopic]