Is there a way to use an external logic signal to halt the CPU without instrumentation on the target CPU? Is there a trigger event input or similar function on J-Link debug probes?
The idea is to break program execution on an oscilloscope scope trigger event with minimal delay without involving the host PC.
Target hardware is STM32F10x with J-Link Edu.
The idea is to break program execution on an oscilloscope scope trigger event with minimal delay without involving the host PC.
Target hardware is STM32F10x with J-Link Edu.