[SOLVED] Impossible to connect a RENESAS R5F51116 with JLINK (V6.30D).

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  • [SOLVED] Impossible to connect a RENESAS R5F51116 with JLINK (V6.30D).

    Hello,

    We have encourated a problem with the same family of Renesas (RX111). Please, could you help us ?



    We have exactly the same board with 2 processors of RENESAS : R5F511116 and R5F5111117. (same processor but with a different size of flash memory)


    Programmation of R5F51117 with SEGGER JLINK (V6.30D), connection : Fine

    OK, ( MCU_DR : 0xD023).







    Programmation of R5F511116 with SEGGER JLINK (V6.30D), connection : Fine




    KO, (indicate : MCU_DR : 0xD024 unknow sub-family).



    In case of replacement of SEGGER JLINK by a E1 emulator (to verify if hardware is really ok)


    E1 emulator : OK (erase and program)



    Thank you in advance for your answer


    Best regards

    frantz
  • Hello Frantz,

    Thank you for your inquiry.
    Such an issue is not known to us.
    Could you tell us your S/N of the J-Link you are using?
    Are you using custom hardware or an eval board? If an eval board which one?
    Could you post a Commader output screenshot of the failed connection?
    wiki.segger.com/J-Link_cannot_…ty_using_J-Link_Commander
    Could you provide us with a J-Link log file from the failed session?
    wiki.segger.com/Enable_J-Link_log_file

    Best regards,
    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hello Nino,

    - S/N : 59104848 (JLINK)

    - We are using a production board (40 000 cards already built), and we have decided to reduce the price with the R5F51116 in replacment of R5F51117. We have verified the hard with a E1 emulator, all is ok with it (erase and programming).

    Please find below

    - .log
    - .scr (commander)
    - .bat (extract)
    - redirection of stdout when the problem occurs.


    Thank you very much for your help,

    Best regards

    frantz






    ------------------------------------

    here the .log :


    T0610 001:530 SEGGER J-Link V6.30d Log File (0000ms, 1527ms total)
    T0610 001:530 DLL Compiled: Feb 16 2018 13:30:32 (0000ms, 1527ms total)
    T0610 001:530 Logging started @ 2018-02-20 09:21 (0000ms, 1527ms total)
    T0610 001:530 JLINK_IsHalted() returns TRUE (0000ms, 1527ms total)
    T0610 001:530 JLINK_DownloadFile()JLINK_BeginDownload(Flags = 0x00) (0002ms, 1529ms total)
    T0610 001:530 JLINK_WriteMem(0xFFFE0000, 0x005C Bytes, ...) - Data: 5C 00 56 2C 9C 00 8D 54 D4 48 A5 CE 6C 09 53 2D ... -- CPU_WriteMem(16 bytes @ 0x00000000) returns 0x5C (0003ms, 1530ms total)
    T0610 001:530 JLINK_WriteMem(0xFFFE0100, 0x1A8F8 Bytes, ...) - Data: 00 FA 00 1E 00 46 00 3C 00 20 1C 00 00 80 70 00 ... returns 0x1A8F8 (0003ms, 1530ms total)
    T0610 001:530 JLINK_WriteMem(0xFFFFFF80, 0x0080 Bytes, ...) - Data: FF FF FF FF 00 00 00 00 7F FF FF FF FF FF FF FF ... returns 0x80 (0003ms, 1530ms total)
    T0610 001:530 JLINK_EndDownload() -- -------------------------------------- -- Start of determining dirty areas in flash cache -- End of determining dirty areas -- Start of preparing flash programming -- Calculating RAM usage -- RAM usage = 17720 Bytes -- Preserving CPU registers -- Preparing memory -- Determining CPU clock frequency -- CPU frequency = 521 kHz -- Preparing target -- Preserving target RAM temporarily used for programming -- Downloading RAMCode
    -- Not first flash download, checking target RAM skipped -- Preparing RAMCode -- End of preparing flash programming -- CPU is running at 16000 kHz. -- Start of comparing flash -- CRC check was estimated as fastest method -- Comparing range 0xFFFE0000 - 0xFFFFABFF (107 Sectors, 107 KB), using single-block CRC calculation -- CRC does not match, checking individual sectors -- CRC does not match for sectors 264-295 -- CRC matches for sectors 296-327 -- CRC matches for sectors 328-359
    -- CRC matches for sectors 360-370 -- Comparing range 0xFFFFFC00 - 0xFFFFFFFF (1 Sector, 1024 Bytes), using single-block CRC calculation -- CRC does not match for sector 391 -- Comparing range 0xFFFE8000 - 0xFFFFABFF (75 Sectors, 75 KB), using alternative single-block CRC calculation -- CRC matches -- End of comparing flash -- Start of erasing sectors -- Erasing range 0xFFFE0000 - 0xFFFE7FFF (032 Sectors, 32 KB) -- Erasing range 0xFFFFFC00 - 0xFFFFFFFF (001 Sector, 1024 Bytes) -- End of erasing sectors
    -- Start of flash programming -- Programming range 0xFFFE0000 - 0xFFFE7FFF (032 Sectors, 32 KB) -- Programming range 0xFFFFFC00 - 0xFFFFFFFF (001 Sector, 1024 Bytes) -- End of flash programming -- 0xFFFE0000 - 0xFFFE7FFF (032 Sectors, 32 KB) -- 0xFFFFFC00 - 0xFFFFFFFF (001 Sector, 1024 Bytes) -- Start of verifying flash -- Checksum calculation was estimated as fastest method -- Checksum is not supported by this flash bank. Switched to read back method.
    -- Checksum calculation was estimated as fastest method -- Checksum is not supported by this flash bank. Switched to read back method. -- End of verifying flash -- Start of restoring -- Restoring RAMCode -- Restoring target memory -- Restore target -- Restore memory -- Restoring CPU registers -- End of restoring -- Bank 0 @ 0x00100000: 2 ranges affected (33792 bytes) -- Total time needed: 2.614s (Prepare: 0.448s, Compare: 0.406s, Erase: 0.431s, Program: 1.094s, Verify: 0.053s, Restore: 0.180s)
    returns 0x8400 (2620ms, 4147ms total)
    T0610 001:530 returns 0x00 (2620ms, 4147ms total)
    T0610 004:150 JLINK_IsOpen() returns 0x01 (0000ms, 4147ms total)
    T0610 004:162 JLINK_Close() -- CPU_ReadMem(64 bytes @ 0xFFFFFF80) -- Updating C cache (64 bytes @ 0xFFFFFF80) -- Read from C cache (4 bytes @ 0xFFFFFF88)Disabling ongoing debug mode. (0003ms, 4150ms total)
    T0610 004:162 -- -------------------------------------- -- Start of determining dirty areas in flash cache -- End of determining dirty areas -- Start of preparing flash programming -- Calculating RAM usage -- RAM usage = 2360 Bytes -- Preserving CPU registers -- Preparing memory -- Determining CPU clock frequency -- CPU frequency = 524 kHz -- Preparing target -- Preserving target RAM temporarily used for programming -- Downloading RAMCode -- Not first flash download, checking target RAM skipped
    -- Preparing RAMCode -- End of preparing flash programming -- CPU is running at 16000 kHz. -- Start of comparing flash -- CRC check was estimated as fastest method -- Comparing range 0xFFFFFC00 - 0xFFFFFFFF (1 Sector, 1024 Bytes), using single-block CRC calculation -- CRC does not match for sector 391 -- End of comparing flash -- Start of erasing sectors -- Erasing range 0xFFFFFC00 - 0xFFFFFFFF (001 Sector, 1024 Bytes) -- End of erasing sectors -- Start of flash programming
    -- Programming range 0xFFFFFC00 - 0xFFFFFFFF (001 Sector, 1024 Bytes) -- End of flash programming -- 0xFFFFFC00 - 0xFFFFFFFF (001 Sector, 1024 Bytes) -- Start of verifying flash -- Checksum calculation was estimated as fastest method -- Checksum is not supported by this flash bank. Switched to read back method. -- End of verifying flash -- Start of restoring -- Restoring RAMCode -- Restoring target memory -- Restore target -- Restore memory -- Restoring CPU registers -- End of restoring
    -- Bank 0 @ 0x00100000: 1 range affected (1024 bytes) -- Total time needed: 0.460s (Prepare: 0.305s, Compare: 0.011s, Erase: 0.019s, Program: 0.035s, Verify: 0.025s, Restore: 0.063s)Ongoing debug mode disabled. (0464ms, 4611ms total)
    T0610 004:162 (0474ms, 4621ms total)
    T0610 004:162 (0474ms, 4621ms total)
    T0610 004:162 Closed (0474ms, 4621ms total)

    ---------------------------------------------------

    Here the commander script: ( prgSegger.scr)


    eoe 1
    rx 10
    log q:\prjPrgSegger\prgSegger.log
    loadfile q:\motManager\serial.mot
    exit

    -------------------------------

    Here the line of command


    %pathPrgExe% -device R5F51116 -if FINE -speed 3000 -autoconnect 1 -CommanderScript %pathScript%\prgSegger.scr

    -----------------------------------


    Q:\prjPrgSegger>echo off
    SEGGER J-Link Commander V6.30d (Compiled Feb 16 2018 13:30:47)
    DLL version V6.30d, compiled Feb 16 2018 13:30:32


    Script file read successfully.
    Processing script file...

    J-Link Commander will now exit on Error

    J-Link connection not established yet but required for command.
    Connecting to J-Link via USB...O.K.
    Firmware: J-Link V9 compiled Feb 16 2018 13:04:36
    Hardware version: V9.10
    S/N: 59104848
    License(s): GDB
    VTref = 3.295V
    Target connection not established yet but required for command.
    Device "R5F51116" selected.


    Connecting to target via FINE
    FINE: Found Renesas device
    Found Renesas RX device (unknown sub-family) (MCU_DR: 0xD024)
    Starting debugger authentication...
    Debugger authenticated successfully.
    Endian: little

    **************************
    WARNING: RX: Unknown RX series device. OFS1 cannot be configured. Debugging may not work properly.
    **************************

    RX identified.
    Reset delay: 10 ms
    Reset type NORMAL: Reset CPU via RESET pin

    **************************
    WARNING: CPU could not be halted
    **************************


    ****** Error: Error while trying to reset target.


    Syntax: loadfile <filename> [<addr>]

    Script processing completed.


    **************************
    WARNING: CPU could not be halted
    **************************


    **************************
    WARNING: RX: Unknown RX series device. OFS1 cannot be configured. Debugging may not work properly.
    **************************

    RESULT=1
  • Hello,

    Thank you for providing the additional information.
    It seems that the R5F51116 target device has some other sub family parameters than the other RX111 devices.
    Unfortunately we currently have only R5F51115 eval boards in house so we can't reproduce the issue here.
    Would it be an option for you to send us your R5F51116 hardware temporarily so we can fix the implementation?

    Best regards,
    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hello Nino,

    Unfortunately, we have a test device that use nails (for interface with processor), and that allows to do the programming.
    We can send you an electronic card, but it will be difficult to interface with the Jlink.


    Your work is very important for us because our production is stopped. Maybe we can ask Mr. Tolentino Martins from Renesas, if he can put someone to give you this information?


    Do not hesitate to tell us the best way for you,


    Best regards


    Frantz
  • Hello Frantz,

    we would like to discuss this further per e-mail. I have send you a PM with contact information.
    This thread will be closed now.

    Edit: Issue has been resolved and a fix will be part of the next J-Link release version.

    Best regards,
    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.