[SOLVED] JLink Ultra+ support for RT1052 processor

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  • [SOLVED] JLink Ultra+ support for RT1052 processor

    I am trying to use a JLink Ultra+ on a NXP RT1052 eval board.
    I am using this with a Segger Embedded Studio. I have build one of the demo applications (Hello) and tried to flash it into QSPI memory on this board
    This board has a 1V8 QSPI 8MB device on it (IS25WP064AJBLE).
    I have changed the jumper at SW7 to boot from this QSPI device
    Once I have plugged in the JLink device on to this board I see the right 2 green leds illuminated
    When I disconnect the power I see the LED on right go out.
    When I try and connect to this device I get the following from the JLINK Ultra+ device


    I have had 2 different outcomes


    • A window pops up with a message that it failed to write to memory. When this happens I see the following the output
    • Connecting ‘J-Link’ using ‘USB’
    • Connecting to target using SWD
    • Loaded F:/Program Files/SEGGER/SEGGER Embedded Studio for ARM 3.34/bin/JLink_x64.dll
    • Firmware Version: J-Link Ultra V4 compiled Dec 12 2017 11:23:58
    • DLL Version: 6.22d
    • Hardware Version: V4.00
    • Target Voltage: 3.329
    • Device "MCIMXRT1051" selected.
    • Found SW-DP with ID 0x0BD11477
    • Scanning AP map to find all available APs
    • AP[1]: Stopped AP scan as end of AP map has been reached
    • AP[0]: AHB-AP (IDR: 0x04770041)
    • Iterating through AP map to find AHB-AP to use
    • AP[0]: Core found
    • AP[0]: AHB-AP ROM base: 0xE00FD000
    • CPUID register: 0x411FC271. Implementer code: 0x41 (ARM)
    • Found Cortex-M7 r1p1, Little endian.
    • FPUnit: 8 code (BP) slots and 0 literal slots
    • CoreSight components:
    • ROMTbl[0] @ E00FD000
    • ROMTbl[0][0]: E00FE000, CID: B105100D, PID: 000BB4C8 ROM Table
    • ROMTbl[1] @ E00FE000
    • ROMTbl[1][0]: E00FF000, CID: B105100D, PID: 000BB4C7 ROM Table
    • ROMTbl[2] @ E00FF000
    • ROMTbl[2][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7
    • ROMTbl[2][1]: E0001000, CID: B105E00D, PID: 000BB002 DWT
    • ROMTbl[2][2]: E0002000, CID: B105E00D, PID: 000BB00E FPB-M7
    • ROMTbl[2][3]: E0000000, CID: B105E00D, PID: 000BB001 ITM
    • ROMTbl[1][1]: E0041000, CID: B105900D, PID: 001BB975 ETM-M7
    • ROMTbl[1][2]: E0042000, CID: B105900D, PID: 004BB906 CTI
    • ROMTbl[0][1]: E0040000, CID: B105900D, PID: 000BB9A9 TPIU-M7
    • ROMTbl[0][2]: E0043000, CID: B105F00D, PID: 001BB101 TSG
    • Cache: Separate I- and D-cache.
    • I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way
    • D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
    • Preparing target for download
    • Loading target script file MIMXRT1051_Target.js
    • Executing script Reset();
    • Reset: Halt core after reset via DEMCR.VC_CORERESET.
    • Reset: Reset device via AIRCR.SYSRESETREQ.
    • Downloading ‘tst1.elf’ to J-Link
    • Programming 4.4 KB of addresses 80000000 — 800011ef
    • Preparing target for download
    • Loading target script file MIMXRT1051_Target.js
    • Executing script Reset();
    • Reset: Halt core after reset via DEMCR.VC_CORERESET.
    • Reset: Reset device via AIRCR.SYSRESETREQ.
    • Reset: SYSRESETREQ has confused core.
    • Found SW-DP with ID 0x0BD11477
    • AP map detection skipped. Manually configured AP map found.
    • AP[0]: AHB-AP (IDR: Not set)
    • AP[0]: Skipped. Could not read AHB ROM register
    • Reset: Using fallback: VECTRESET.
    • Reset: Halt core after reset via DEMCR.VC_CORERESET.
    • Reset: Reset device via AIRCR.VECTRESET.
    • Reset: VECTRESET has confused core.
    • Reset: Using fallback: Reset pin.
    • Reset: Halt core after reset via DEMCR.VC_CORERESET.
    • Reset: Reset device via reset pin
    • Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
    • Reset: Reconnecting and manually halting CPU.
    • Found SW-DP with ID 0x0BD11477
    • AP map detection skipped. Manually configured AP map found.
    • AP[0]: AHB-AP (IDR: Not set)
    • AP[0]: Skipped. Could not read AHB ROM register
    • CPU could not be halted
    • Reset: Core is locked-up, trying to disable WDT.
    • Reset: Halt core after reset via DEMCR.VC_CORERESET.
    • Reset: Reset device via reset pin
    • Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
    • Reset: Reconnecting and manually halting CPU.
    • Found SW-DP with ID 0x0BD11477
    • AP map detection skipped. Manually configured AP map found.
    • AP[0]: AHB-AP (IDR: Not set)
    • AP[0]: Skipped. Could not read AHB ROM register
    • CPU could not be halted
    • Reset: Failed. Toggling reset pin and trying reset strategy again.
    • Found SW-DP with ID 0x0BD11477
    • AP map detection skipped. Manually configured AP map found.
    • AP[0]: AHB-AP (IDR: Not set)
    • AP[0]: Skipped. Could not read AHB ROM register
    • Reset: Halt core after reset via DEMCR.VC_CORERESET.
    • Reset: Reset device via AIRCR.SYSRESETREQ.
    • Reset: SYSRESETREQ has confused core.
    • Found SW-DP with ID 0x0BD11477
    • AP map detection skipped. Manually configured AP map found.
    • AP[0]: AHB-AP (IDR: Not set)
    • AP[0]: Skipped. Could not read AHB ROM register
    • Reset: Using fallback: VECTRESET.
    • Reset: Halt core after reset via DEMCR.VC_CORERESET.
    • Reset: Reset device via AIRCR.VECTRESET.
    • Reset: VECTRESET has confused core.
    • Reset: Using fallback: Reset pin.
    • Reset: Halt core after reset via DEMCR.VC_CORERESET.
    • Reset: Reset device via reset pin
    • Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
    • Reset: Reconnecting and manually halting CPU.
    • Found SW-DP with ID 0x0BD11477
    • AP map detection skipped. Manually configured AP map found.
    • AP[0]: AHB-AP (IDR: Not set)
    • AP[0]: Skipped. Could not read AHB ROM register
    • CPU could not be halted
    • Reset: Core is locked-up, trying to disable WDT.
    • Reset: Halt core after reset via DEMCR.VC_CORERESET.
    • Reset: Reset device via reset pin
    • Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
    • Reset: Reconnecting and manually halting CPU.
    • Found SW-DP with ID 0x0BD11477
    • AP map detection skipped. Manually configured AP map found.
    • AP[0]: AHB-AP (IDR: Not set)
    • AP[0]: Skipped. Could not read AHB ROM register
    • CPU could not be halted
    • Could not find core in Coresight setup
    • Can not read register 0 (R0) while CPU is running
    • Can not read register 1 (R1) while CPU is running
    • Can not read register 2 (R2) while CPU is running
    • Can not read register 3 (R3) while CPU is running
    • Can not read register 4 (R4) while CPU is running
    • Can not read register 5 (R5) while CPU is running
    • Can not read register 6 (R6) while CPU is running
    • Can not read register 7 (R7) while CPU is running
    • Can not read register 8 (R8) while CPU is running
    • Can not read register 9 (R9) while CPU is running
    • Can not read register 10 (R10) while CPU is running
    • Can not read register 11 (R11) while CPU is running
    • Can not read register 12 (R12) while CPU is running
    • Can not read register 13 (R13) while CPU is running
    • Can not read register 14 (R14) while CPU is running
    • Can not read register 15 (R15) while CPU is running
    • Can not read register 16 (XPSR) while CPU is running
    • Can not read register 17 (MSP) while CPU is running
    • Can not read register 18 (PSP) while CPU is running
    • Can not read register 20 (CFBP) while CPU is running
    • Downloading ‘tst1.elf’ to J-Link
    • Programming 4.4 KB of addresses 80000000 — 800011ef
    • Target connection has been lost
    • The other failure happens after the first failure when I try again
    • A popup is display that says "No idcode detected"
    • In the output box I see the following
    • Connecting ‘J-Link’ using ‘USB’
    • Connecting to target using SWD
    • Loaded F:/Program Files/SEGGER/SEGGER Embedded Studio for ARM 3.34/bin/JLink_x64.dll
    • Firmware Version: J-Link Ultra V4 compiled Dec 12 2017 11:23:58
    • DLL Version: 6.22d
    • Hardware Version: V4.00
    • Target Voltage: 3.329
    • Device "MCIMXRT1051" selected.
    • Found SW-DP with ID 0x0BD11477
    • Could not power-up debug power domain.
    • Scanning AP map to find all available APs
    • AP[0]: Stopped AP scan as end of AP map seems to be reached
    • Iterating through AP map to find AHB-AP to use
    • Found SW-DP with ID 0x0BD11477
    • Could not power-up debug power domain.
    • Scanning AP map to find all available APs
    • AP[0]: Stopped AP scan as end of AP map seems to be reached
    • Iterating through AP map to find AHB-AP to use
    • Could not find core in Coresight setup
    • connect failed
    • Failed to connect to target.
    • No idcode detected.
    • Please check connection and Target Interface Type

  • Hello,

    Thank you for your inquiry.
    QSPI Flash support is currently not supported for imxRT1052 devices.
    Support is expected to be added by the end of Q2 2018.
    Should you need support earlier you can add support yourself using our open flashloader interface: wiki.segger.com/Adding_Support_for_New_Devices

    Best regards,
    Nino
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