Embedded Trace Buffer on STM32H743II

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  • Embedded Trace Buffer on STM32H743II

    Hi,

    I'm trying to use the ETB on an STM32H743II with a J-Link Pro V4.00 (SW V6.30). I'm trying to do this with Segger Ozone debugger SW.
    When I download my code to target and start the session I get an error message: "ETB selected as trace source, but current device does not support an ETB".
    Not sure what device relates to here. Is it my J-link? The target processor has an ETB of 4 kB.
    Is this function not implemented for this processor yet? If not when will it be?
    Or do I need a J-Trace probe?

    Best regards,
    Anton

    The post was edited 1 time, last by AntonLag ().

  • Hello Anton,

    Thank you for your inquiry.
    Generally ETB on Cortex-M is supported out-of-the-box without additional configuration required. Also with J-Links.
    J-Trace is only needed if you want advanced ETM pin trace with high speed streaming trace features.
    Unfortunately the H7 is by no means a "normal" Cortex-M device. It comes with many Cortex-A like debug features like a 8 kB ETF/TMC instead of a ETB which are only accessible over a APB instead of a AHB. All this differences make trace configurations a lot trickier then they usually are for Cortex-M devices.

    That is why for this device additional setups are needed.
    A working streaming trace example for the J-Trace is already available and can be downloaded here: wiki.segger.com/Tracing_on_ST_STM32H743

    A ETF trace example is expected to be released by the end of the week in the same wiki article.

    Best regards,
    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hi Anton,

    Sorry for the delay.
    We had to postpone the H7 ETF project as we have some more pressing projects on our hands at the moment.
    A rough estimate for the project release is currently not possible. We will try to squeeze it in when possible.
    The issue is that for the H7 the Coresight components need to be initialized in a very inconvenient manner which increases the JLinkScript complexity enormously compared to other Cortex-M devices.

    What we could offer you is to provide you the JLinkScript in source form for the pin trace init and you can use that as reference to enable ETF/TMC trace on your own.
    Would that be of interest for you?

    Best regards,
    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hi Anton,

    we will contact you per e-mail then.
    This thread will now be closed.

    Best regards,
    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.