[SOLVED] JLINK and MX7D - TAP ID / CPU-Tap not found

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  • [SOLVED] JLINK and MX7D - TAP ID / CPU-Tap not found

    Hello everyone,

    we have just updated to a new JLink in order to program/debug an i.MX7D device.

    For a test, I wanted to connect to NXP demo board (MX7 Sabre).

    I tried connecting to the A7 using JLink.exe, but get the result listed below (see line 17).
    As suggested in other threads, the JTAG clock speed has been limited to <400 KHz. The target board is powered (JLINK detects 3,3V).
    The scripts for connecting to the cores were mentioned in the other threads as well. Based on the console output below I assume these do not have to be called/setup manually.


    C Source Code

    1. J-Link>connect
    2. Device "MCIMX7D7_A7_0" selected.
    4. Connecting to target via JTAG
    5. ***************************************************
    6. J-Link script: iMX7D Cortex-A7_0 core J-Link script
    7. ***************************************************
    8. TotalIRLen = 5, IRPrint = 0x01J
    9. TAG chain detection found 1 devices: #0 Id: 0x088E001D, IRLen: 04, JTAG-DP
    10. ***************************************************
    11. J-Link script: iMX7D Cortex-A7_0 core J-Link script
    12. ***************************************************
    13. TotalIRLen = 5, IRPrint = 0x01J
    14. TAG chain detection found 1 devices:
    15. #0 Id: 0x088E001D, IRLen: 04, JTAG-DP
    17. ****** Error: JTAG Id mismatch. TAP with Id 0x00000000 is no JTAG-DP
    19. ***************************************************
    20. J-Link script: iMX7D Cortex-A7_0 core J-Link script
    21. ***************************************************
    22. TotalIRLen = 5, IRPrint = 0x01JTAG chain detection found 1 devices:
    23. #0 Id: 0x088E001D, IRLen: 04, JTAG-DP
    24. ***************************************************
    25. J-Link script: iMX7D Cortex-A7_0 core J-Link script
    26. ***************************************************
    27. TotalIRLen = 5, IRPrint = 0x01JTAG chain detection found 1 devices:
    28. #0 Id: 0x088E001D, IRLen: 04, JTAG-DPCannot connect to target.
    29. J-Link>
    Display All


    Using the JlinkGDBserver through thw win10 command line gives the folowing (same) output, with no mentioning of the connect scripts, resulting in the same error:

    C Source Code

    1. C:\Program Files (x86)\SEGGER\JLink_V622g>JLinkGDBServerCL.exe -device MCIMX7D7_M4 -speed 300 -select USB
    2. SEGGER J-Link GDB Server V6.22g Command Line Version
    3. JLinkARM.dll V6.22g (DLL compiled Jan 17 2018 16:39:42)
    4. Command line: -device MCIMX7D7_A7_0 -speed 300 -select USB
    5. -----GDB Server start settings-----
    6. GDBInit file: none
    8. GDB Server Listening port: 2331
    9. SWO raw output listening port: 2332
    10. Terminal I/O port: 2333
    11. Accept remote connection: localhost only
    12. Generate logfile: off
    13. Verify download: off
    14. Init regs on start: off
    15. Silent mode: off
    16. Single run mode: off
    17. Target connection timeout: 0 ms
    18. ------J-Link related settings------
    19. J-Link Host interface: USBJ-Link
    20. script: none
    21. J-Link settings file: none
    22. ------Target related settings------
    23. Target device: MCIMX7D7_A7_0
    24. Target interface: JTAG
    25. Target interface speed: 300kHz
    26. Target endian: little
    29. Connecting to J-Link...
    30. J-Link is connected.
    33. Firmware: J-Link V10 compiled Jan 11 2018 10:41:05
    36. Hardware: V10.10
    39. S/N: 50117772
    40. Feature(s): GDB
    41. Checking target voltage...Target voltage: 3.32 V
    42. Listening on TCP/IP port 2331
    43. Connecting to target...ERROR: JTAG Id mismatch. TAP with Id 0x00000000 is no JTAG-DP
    44. ERROR: Could not connect to target.Target connection failed. GDBServer will be closed...Restoring target state and closing J-Link connection...
    45. Shutting down...
    46. Could not connect to target.Please check power, connection and settings.
    Display All


    I had the same problem before with a hand soldered adaptor 20 pin arm JTAG to 10 pin arm JTAG with lots of air-wires and assumed there might be something wrong with the adaptor. Bought an olimex 20->10 pin adaptor that I am using now.

    If i try the same using the M4, it says "CPU_TAP not found in JTAG Chain" instead (probably cause it needs to be booted by the A7 first).

    So my questions are:
    • Connect sequence must be A7_0, A7_1, M4 with no deviation allowed?
    • Do I need to setup/provide/link the connect scripts somehow?
    • What might cause the 0x00000000 TAP ID readout (ARM 10 pin - olimex 10-20 adaptor - JLINK)?
    • "JTAG Device not found" is caused by trying to connect to the M4 before the A7 are running?
    • Am I missing anything?

  • Hello,

    Thank you for your inquiry.
    We tried to reproduce the issue but everything was working fine with the iMX7D SABRE board we have here. Each core was accessible.
    For testing we used a J-Link Plus and the following adapter: segger.com/products/debug-prob…s/9-pin-cortex-m-adapter/

    What board revision are you using? For our tests we used Revision D. You can find a sticker on the bottom of the boards.
    Revision A boards for example did not have JTAG support.
    Could you try using SWD instead of JTAG using the J-Link Commander? wiki.segger.com/J-Link_cannot_…ty_using_J-Link_Commander

    Connect sequence must be A7_0, A7_1, M4 with no deviation allowed?

    It does not matter what core you try to connect to. If the JLinkScripts are executed correctly everything is taken care of.

    Do I need to setup/provide/link the connect scripts somehow?

    In you commander log the scripts launched successfully. For the GDBServer it seems that you need to pass them manually, depending on which device you are using.
    More information on that can be found in the J-Link user manual.

    What might cause the 0x00000000 TAP ID readout (ARM 10 pin - olimex 10-20 adaptor - JLINK)?
    "JTAG Device not found" is caused by trying to connect to the M4 before the A7 are running?
    Am I missing anything?


    I am guessing that your board does not support JTAG or it is disabled in some way. Try SWD for reference to make sure that the core itself is generally accessible.

    Best regards,
    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Thank you Nino for your detailed answer.

    Its a revision D board as well. Using SWD didn't work either.

    While reading your post again (especially the section about JTAG not being enabled ... "why wouldnt it be?!", I thought) I rememberd I had changed the resistor setup to put the board in boundary scan mode some weeks ago.


    After adjusting the resistors, everything works fine now!
    Many thanks!



    Found SW-DP with ID 0x5BA02477
    CoreSight AP[0]: 0x04770001, AHB-AP
    CoreSight AP[1]: 0x04770002, APB-AP
    CoreSight AP[2]: 0x0477000F, Unknown-AP (Reserved)
    CoreSight AP[3]: 0x0477000F, Unknown-AP (Reserved)
    CoreSight AP[4]: 0x04770001, AHB-AP
    ROMTbl 0 [0]: 00040003, CID: B105100D, PID:00-00080000 ROM Table
    ROMTbl 1 [0]: 00001003, CID: B105900D, PID:04-002BB908 CSTF
    ROMTbl 1 [1]: 00020003, CID: B105100D, PID:04-000BB4A7 ROM Table
    ROMTbl 2 [0]: 00010003, CID: B105900D, PID:04-005BBC07 Cortex-A7
    Found Cortex-A7 r0p5
    6 code breakpoints, 4 data breakpoints
    Debug architecture ARMv7.1
    Data endian: little
    Main ID register: 0x410FC075
    I-Cache L1: 32 KB, 128 Sets, 64 Bytes/Line, 4-Way
    D-Cache L1: 32 KB, 128 Sets, 64 Bytes/Line, 4-Way
    Unified-Cache L2: 32 KB, 128 Sets, 64 Bytes/Line, 4-Way
    System control register:
    Instruction endian: little
    Level-1 instruction cache enabled
    Level-1 data cache enabled
    MMU enabled
    Branch prediction enabled
    Cortex-A7 identified.

  • Hi,

    Great to hear that you are up and running again.
    We will consider this case as closed now.

    Best regards,
    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.