[ABANDONED] J-Link ATSAME54 can't halt CPU

This site uses cookies. By continuing to browse this site, you are agreeing to our Cookie Policy.

  • [ABANDONED] J-Link ATSAME54 can't halt CPU

    Hi,

    With a j-link connected to a Microchip ATSAME54-XPRO using a Segger 9 pin Cortex-M adapter, the j-link is unable to halt the CPU.

    Using Atmel Studio 7.0 (Build 1645), programming and debugging this board is possible via Atmel's EDBG, and other ATSAM family parts work fine with the J-Link and AS7.

    Microchip support duplicated this and suggested advising Segger of the issue.

    I have tried Segger firmware/DLL versions from 6.16 through 6.22f, and I have tried removing the four isolation resistors that isolate the EDBG CPU.

    I've attached two log files, one with AS7 establishing a connection and attempting a chip erase, and the other is a jlink.exe session log showing failed reset attempts.

    Thanks,

    -Dave
    Files
  • Hello Dave,

    Thank you for your inquiry.
    Such an issue is not known to us.
    We just verified the functionality of the debug connection with a J-Link Plus, SAME54 XPlained Pro board, J-Link software version V6.22f and using the 9-pin debug connector.
    Everything was working as expected when using the J-Link Commander. Halting the target was no problem.

    For verification could you follow the instructions for connecting with J-Link Commander? wiki.segger.com/J-Link_cannot_…ty_using_J-Link_Commander

    After connecting type halt. Does that work for you?
    Make sure to turn the target device off and on before testing to reset the target should it be in some kind of locked state.

    According to the log files you are trying to read from 0x41002101 which seems to be reserved memory.
    Some ATMEL devices will hardfault when accessing reserved memory space.
    Do you have some memory window open in AS7 that is constantly refreshing or something similar that might explain the memory reads?
    If so try to close it and see if the behaviour improves.

    Best regards,
    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hello Nino,

    The second attachment to my original message is a J-Link Commander dialog showing that "halt" along with "rx 0" and "r" don't work. However, I once again repeated this process, from target power on, and have limited the test to just a "halt", and attached that output to this response.


    The first attachment to my original message, the log file output, you referred to having the invalid memory access(s) is simply Atmel Studio 7 from the point of debugger attachment through attempted Chip Erase.

    Referring to Microchip Document DS60001507A, the graphic on Page 48 shows AHB-APB Bridge B located at 0x41000000 and the DSU located at offset 0x2000. Referring to Section 12.9 at page 100, external DSU access must be offset by 0x0100, into memory mirrored from offset 0x0000. Therefore the 32 bit write to 0x41002100 attempts to set Chip Erase, the 8 bit read from 0x41002101 is a read of Status Register A, documented on pages 110 and 111 respectively.

    The ATSAME54-XPRO board itself is Revision 5 and has a ATSAME54P20A mounted. I do not know if the "A" suffix is relevant, but do note that no distinction is made in the j-link dialog list of available devices.

    Are you working with the same demo board and silicon revisions?

    --Dave
    Files
  • Hello Dave,

    Thanks for providing additional information.
    That halt is not working in J-Link Commander is quite curious, especially after a connect is working.
    Do you have any application, bootloader etc. running on that MCU that might alter the debug port behaviour?
    For example resetting GPIO settings, limiting debug access or changing device security etc?

    As for the boards we have here we only have engineering samples from Atmel with ATSAME54P20A MCUs on it.
    Not sure if it makes a difference in that regard. Where on the board would it read what revision it is? Could you attach a picture?

    Could you try debugging the following example project created with Embedded Studio to make sure that no *bad* application is the source of this behaviour?
    download.segger.com/Nino/SAME54_XPlained.zip
    The link will be available for at least 24 h.
    Embedded studio can be downloaded on the following link and can be used for free for evaluation purposes: segger.com/downloads/embedded-studio/

    Could you unzip the project, launch the emproject file with Embedded Studio and start debugging the application by simply pressing F5?

    Does that program load and is debuggable?

    Best regards,
    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hi Nino,

    There is no "project" at this time, I simply wanted to evaluate the part, so any of the testing done with J-link has been with an erased part (using AS7 and the ATMEL EDBG) OR with a simple blinking LED type test running.

    I tried your test with Embedded Studio and obtained identical results (can't halt, can't erase, etc.) as with Jlink commander, and AS7.

    As to identifying the demo board, there should be a sticker on the bottom with product code/revision and serial number on it. A09-2748 is the product code, then "/05" for revision 5.

    Per Microchip DS70005321A, roughly page 45, it notes that the revision 4 of the PCB has early silicon mounted, revision 5 has rev "A0" mounted.

    Pardon my repetition, but I want to make sure that you saw that Microchip support also can't get a J-Link to work with this demo board either.

    Thanks,

    --Dave
  • Hi Dave,

    Thank you for providing additional details.

    There is no "project" at this time, I simply wanted to evaluate the part, so any of the testing done with J-link has been with an erased part (using AS7 and the ATMEL EDBG) OR with a simple blinking LED type test running.

    Ok, this is really odd then. Does debugging using EDBG with AS7 work? Or do you get similar issues?

    As to identifying the demo board, there should be a sticker on the bottom with product code/revision and serial number on it. A09-2748 is the product code, then "/05" for revision 5.


    We checked the boards that we have here and they are all ES samples based on revision 4 according to the sticker.


    Pardon my repetition, but I want to make sure that you saw that Microchip support also can't get a J-Link to work with this demo board either.


    We contacted our Microchip contacts in this regard to shed some light on the issue and get sample hardware for reproduction.
    Once we get new information you will be informer here.

    Sorry for any inconveniences caused.

    Best regards,
    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hi Nino,

    Atmel's EDBG with AS7 works fine.

    I had also tried removing the isolation resistors so that there was no question that the EDBG didn't pose a conflict for the SWD J-link connection. No effect.

    Thanks,

    --Dave
  • Hello Dave,

    we received the revision 5 boards from Microchip but the issue is still not reproducible.
    Do you have another SAME54 eval board to test against?
    Could you test the setup with J-Link commander on another PC?
    Do you have a second J-Link for testing?

    Best regards,
    Nino
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.