[SOLVED] How to setup JLink for background memory access of RM48L952 for real-time terminal?

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  • [SOLVED] How to setup JLink for background memory access of RM48L952 for real-time terminal?

    Hello.
    As I see there is AHB bridge in RM48L952 so background memory access may be used to get RTT working.
    Is the part of .JLinkScript file to setup for use AHB instead of APB correct?

    /*********************************************************************
    *
    * InitTarget
    */
    void InitTarget(void) {
    Report("J-Link script: InitTarget()");
    //
    // Reset debug logic in order to make sure that ONLY the ICEPick is in the JTAG chain
    //
    JTAG_TRSTPin = 0;
    SYS_Sleep(50);
    JTAG_TRSTPin = 1;
    SYS_Sleep(50);
    JTAG_Write(0x1F, 0, 6);
    _InitIcePick();
    CORESIGHT_IndexAHBAPToUse = 0;
    }

    I get that TMS570.JLinkScript from CCS v6.2
  • As I see, RTT is really working if I add "CORESIGHT_IndexAHBAPToUse = 0;" to last line to InitTarget() function.

    Next question. Look at that Code Composer Studio screenshot. There is message "Could not read <address>" for unknown reason, even if background memory access using AHB bridge is enabled by upper string in TMS570.JLinkScript.

    Why?

    How can I see content of some memory in Code Composer Studio without stopping my application using background memory access?

    For example, a slowest XDS100v2 may read content of RAM without stopping CPU. But JLink ULTRA+ can't.

    Too many existing software from TI use background memory access. I need to do some kind of motor control, use GUI Composer with JLink and because of this can't stop CPU.

    Is JLink supported in CCS according to this page? segger.com/products/debug-prob…gy/ides/ti-code-composer/
    Or it is erroneous information?

    Regards, Vitaliy
    Images
    • ccs.png

      64.12 kB, 1,052×765, viewed 528 times

    The post was edited 1 time, last by VVB ().

  • Hi,

    Sorry for the delay in response.
    You are trying to read memory during runtime from a Cortex-R device. This is only possible with Cortex-M devices.

    Best regards,
    Nino
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