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Mantequilla

Beginner

Date of registration: Aug 16th 2017

Posts: 8

1

Wednesday, September 13th 2017, 10:23pm

[SOLVED] SetRTTSearchRanges command not working

Greetings,
Problem is that RTT buffer cannot be automatically located. The only way I can get it to work is if I specify it explicitly through
SetRTTAddr. In my case the command would be:
SetRTTAddr 0x700679c0
Obviously there is shortcoming using SetRTTAddr because this address is likely to change often when new data is added to code. It seems that the SetRTTSearchRanges command does not work at all. For example if I use either of the commands below they will fail to find the buffer
SetRTTSearchRanges 0x70060000 0x10000
SetRTTSearchRanges 0x700679c0 0x100
You can see that the second example points to the exact address with a range and so should easily find it although it does not. Can you pleaseverify that this command works? When does JLink do search for RTT buffer?
Thanks,
Man

SEGGER - Niklas

Super Moderator

Date of registration: Oct 6th 2014

Posts: 1,691

2

Thursday, September 14th 2017, 10:30am

Hi Man,


we are currently not aware of any issues regarding SetRTTSearchRanges.
Which target device are you using?
Could you provide us with a reproducer?


Best regards,
Niklas
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Mantequilla

Beginner

Date of registration: Aug 16th 2017

Posts: 8

3

Thursday, September 14th 2017, 2:25pm

Niklas,
I am developing on Microsemi A2f200 which has Cortex-M3 core. I am using JLink Plus with v620 JLinkGDBServer. Code is debugged and developed on Ubuntu linux in Eclipse Neon.3

I manually type the SetRTTSearchRanges command in Debugger Console in eclipse after loading and running to main() but prior to running application.
The command I issue in Debugger console is:

monitor exec SetRTTSearchRanges XXXX XXXX

As mentioned before, entering SetRTTAddr command in Debugger console works.

The application calls SEGGER_RTT_Init () followed by SEGGER_RTT_ConfigUpBuffer(...) prior to any other RTT API calls to output.

All code and initialized data is loaded in RAM external to processor.

When does JLinkDebugger search for RTT buffer? As soon as application runs? When RTT client connects? Constantly?

Thanks,
Man

SEGGER - Niklas

Super Moderator

Date of registration: Oct 6th 2014

Posts: 1,691

4

Thursday, September 14th 2017, 3:34pm

Hi,

I just set up a sample project for a A2F200M3F and autodetection worked fine.
I used the internal RAM for RTT (@ 0x20000000). What Memory do you use @ 0x700679c0 ?
Could you provide a reproducer application?

Best regards,
Niklas
Would you like to be added to the J-Link software update notification list, so you get informed automatically when a new version becomes available?
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Mantequilla

Beginner

Date of registration: Aug 16th 2017

Posts: 8

5

Thursday, September 14th 2017, 9:35pm

Niklas,
Memory located starting at 0x70000000 is PSRAM in external memory controller address space.

If I locate RTT buffer in processor RAM (0x20000000) RTT buffer is always automatically found.
I did not see anywhere in RTT documentation that indicates RTT buffer must be located in processor
memory space as opposed to external RAM. Perhaps it is something I overlooked if this is so.

I do however have another problem that I avoided mentioning until now. RTT crashes our application.
This did not start when I moved RTT buffer to processor RAM, the problem existed when I had the buffer
in external RAM. If I start our application in debugger when JLinkRTTClient is not running it will run normally.
As soon as I start JLinkRTTClient some output will be displayed in client but application crashes on hardware fault.
I am not able to trace.


A2f200 uses 5 bits for interrupt priority. I set...

#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (1 << (32-5))

I am working on building reproducer application.

Any other suggestions until then are appreciated.

Thanks,
Man

Mantequilla

Beginner

Date of registration: Aug 16th 2017

Posts: 8

6

Friday, September 15th 2017, 8:25pm

Niklas,
Minimum FreeRTOS project that will exhibit crash on Microsemi A2F200 is the code below.

This code runs fine on Freescale MK10DX256xxx7. On A2F200 it will output anywhere from a few lines to
to several pages before hardfault. Cortex Hard Fault Status Register value (0x40000000) indicates the reason for fault is "hardfault triggered by debug event".

For A2F200
#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (1 << (32 - 5))

For MK10DX256xxx7
#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)


C/C++ Source code

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#include "FreeRTOS.h"
#include "task.h"
#include "SEGGER_RTT.h"


static void rtt_print_test(void) {

  static unsigned _Cnt;

  SEGGER_RTT_WriteString(0, "SEGGER Real-Time-Terminal Sample\r\n\r\n");
  SEGGER_RTT_WriteString(0, "###### Testing SEGGER_printf() ######\r\n");

  SEGGER_RTT_printf(0, "printf Test: %%c,         'S' : %c.\r\n", 'S');
  SEGGER_RTT_printf(0, "printf Test: %%5c,        'E' : %5c.\r\n", 'E');
  SEGGER_RTT_printf(0, "printf Test: %%-5c,       'G' : %-5c.\r\n", 'G');
  SEGGER_RTT_printf(0, "printf Test: %%5.3c,      'G' : %-5c.\r\n", 'G');
  SEGGER_RTT_printf(0, "printf Test: %%.3c,       'E' : %-5c.\r\n", 'E');
  SEGGER_RTT_printf(0, "printf Test: %%c,         'R' : %c.\r\n", 'R');

  SEGGER_RTT_printf(0, "printf Test: %%s,      \"RTT\" : %s.\r\n", "RTT");
  SEGGER_RTT_printf(0, "printf Test: %%s, \"RTT\\r\\nRocks.\" : %s.\r\n", "RTT\r\nRocks.");

  SEGGER_RTT_printf(0, "printf Test: %%u,       12345 : %u.\r\n", 12345);
  SEGGER_RTT_printf(0, "printf Test: %%+u,      12345 : %+u.\r\n", 12345);
  SEGGER_RTT_printf(0, "printf Test: %%.3u,     12345 : %.3u.\r\n", 12345);
  SEGGER_RTT_printf(0, "printf Test: %%.6u,     12345 : %.6u.\r\n", 12345);
  SEGGER_RTT_printf(0, "printf Test: %%6.3u,    12345 : %6.3u.\r\n", 12345);
  SEGGER_RTT_printf(0, "printf Test: %%8.6u,    12345 : %8.6u.\r\n", 12345);
  SEGGER_RTT_printf(0, "printf Test: %%08u,     12345 : %08u.\r\n", 12345);
  SEGGER_RTT_printf(0, "printf Test: %%08.6u,   12345 : %08.6u.\r\n", 12345);
  SEGGER_RTT_printf(0, "printf Test: %%0u,      12345 : %0u.\r\n", 12345);
  SEGGER_RTT_printf(0, "printf Test: %%-.6u,    12345 : %-.6u.\r\n", 12345);
  SEGGER_RTT_printf(0, "printf Test: %%-6.3u,   12345 : %-6.3u.\r\n", 12345);
  SEGGER_RTT_printf(0, "printf Test: %%-8.6u,   12345 : %-8.6u.\r\n", 12345);
  SEGGER_RTT_printf(0, "printf Test: %%-08u,    12345 : %-08u.\r\n", 12345);
  SEGGER_RTT_printf(0, "printf Test: %%-08.6u,  12345 : %-08.6u.\r\n", 12345);
  SEGGER_RTT_printf(0, "printf Test: %%-0u,     12345 : %-0u.\r\n", 12345);

  SEGGER_RTT_printf(0, "printf Test: %%u,      -12345 : %u.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%+u,     -12345 : %+u.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%.3u,    -12345 : %.3u.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%.6u,    -12345 : %.6u.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%6.3u,   -12345 : %6.3u.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%8.6u,   -12345 : %8.6u.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%08u,    -12345 : %08u.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%08.6u,  -12345 : %08.6u.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%0u,     -12345 : %0u.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%-.6u,   -12345 : %-.6u.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%-6.3u,  -12345 : %-6.3u.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%-8.6u,  -12345 : %-8.6u.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%-08u,   -12345 : %-08u.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%-08.6u, -12345 : %-08.6u.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%-0u,    -12345 : %-0u.\r\n", -12345);

  SEGGER_RTT_printf(0, "printf Test: %%d,      -12345 : %d.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%+d,     -12345 : %+d.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%.3d,    -12345 : %.3d.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%.6d,    -12345 : %.6d.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%6.3d,   -12345 : %6.3d.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%8.6d,   -12345 : %8.6d.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%08d,    -12345 : %08d.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%08.6d,  -12345 : %08.6d.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%0d,     -12345 : %0d.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%-.6d,   -12345 : %-.6d.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%-6.3d,  -12345 : %-6.3d.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%-8.6d,  -12345 : %-8.6d.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%-08d,   -12345 : %-08d.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%-08.6d, -12345 : %-08.6d.\r\n", -12345);
  SEGGER_RTT_printf(0, "printf Test: %%-0d,    -12345 : %-0d.\r\n", -12345);

  SEGGER_RTT_printf(0, "printf Test: %%x,      0x1234ABC : %x.\r\n", 0x1234ABC);
  SEGGER_RTT_printf(0, "printf Test: %%+x,     0x1234ABC : %+x.\r\n", 0x1234ABC);
  SEGGER_RTT_printf(0, "printf Test: %%.3x,    0x1234ABC : %.3x.\r\n", 0x1234ABC);
  SEGGER_RTT_printf(0, "printf Test: %%.6x,    0x1234ABC : %.6x.\r\n", 0x1234ABC);
  SEGGER_RTT_printf(0, "printf Test: %%6.3x,   0x1234ABC : %6.3x.\r\n", 0x1234ABC);
  SEGGER_RTT_printf(0, "printf Test: %%8.6x,   0x1234ABC : %8.6x.\r\n", 0x1234ABC);
  SEGGER_RTT_printf(0, "printf Test: %%08x,    0x1234ABC : %08x.\r\n", 0x1234ABC);
  SEGGER_RTT_printf(0, "printf Test: %%08.6x,  0x1234ABC : %08.6x.\r\n", 0x1234ABC);
  SEGGER_RTT_printf(0, "printf Test: %%0x,     0x1234ABC : %0x.\r\n", 0x1234ABC);
  SEGGER_RTT_printf(0, "printf Test: %%-.6x,   0x1234ABC : %-.6x.\r\n", 0x1234ABC);
  SEGGER_RTT_printf(0, "printf Test: %%-6.3x,  0x1234ABC : %-6.3x.\r\n", 0x1234ABC);
  SEGGER_RTT_printf(0, "printf Test: %%-8.6x,  0x1234ABC : %-8.6x.\r\n", 0x1234ABC);
  SEGGER_RTT_printf(0, "printf Test: %%-08x,   0x1234ABC : %-08x.\r\n", 0x1234ABC);
  SEGGER_RTT_printf(0, "printf Test: %%-08.6x, 0x1234ABC : %-08.6x.\r\n", 0x1234ABC);
  SEGGER_RTT_printf(0, "printf Test: %%-0x,    0x1234ABC : %-0x.\r\n", 0x1234ABC);

  SEGGER_RTT_printf(0, "printf Test: %%p,      &_Cnt      : %p.\r\n", &_Cnt);

  SEGGER_RTT_WriteString(0, "###### SEGGER_printf() Tests done. ######\r\n");
}


static void __InitialTask(void *param)
{
    SEGGER_RTT_Init ();

    while(1)
    {
      rtt_print_test();
    }
}


int main()
{
  xTaskCreate( &__InitialTask,
                 (const signed char * const) "",
                 configMINIMAL_STACK_SIZE,
                 0,
                 8,
                 0 );

  vTaskStartScheduler();

  return 0;
}

This post has been edited 1 times, last edit by "Mantequilla" (Sep 15th 2017, 8:27pm)


SEGGER - Niklas

Super Moderator

Date of registration: Oct 6th 2014

Posts: 1,691

7

Monday, September 18th 2017, 9:52am

Hi,


could please share the code you use the init the PSRAM?


Best regards,
Niklas
Would you like to be added to the J-Link software update notification list, so you get informed automatically when a new version becomes available?
Just write me a PM or in case you want to subscribe to it yourself, please use this link: Link
Notification for J-Link, J-Link Debugger, SystemView & J-Scope: Link
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Mantequilla

Beginner

Date of registration: Aug 16th 2017

Posts: 8

8

Monday, September 18th 2017, 4:32pm

Niklas,
We use UBOOT to copy application from NOR flash to external PSRAM on startup however UBOOT does not do initialization for PSRAM.
Initialization is done through FPGA fabric prior to jumping to UBOOT. Settings are as follows.

Port Size..................................................................................Half Word
Read Latency for First Access (HCLK cycles).........................6
Read Latency for Remaining Accesses (HCLK Cycles)..........6
Write Latency (HCLK Cycles)..................................................6
Configure BYTEN Port as........................................................Byte Enable
Interdevice Latency (HCLK cycles)..........................................1

Processor clock is 72mhz.

It may not have been clear from previous posts but hardfault occurs when using RTT regardless of whether RTT buffer is in PSRAM or
on board processor RAM. The only difference is that RTT buffer is auto detected when located in processor RAM but not in external
PSRAM. I am able to leave RTT buffer in processor RAM so detection issue is no longer a problem unless it is supposed to also
work when in external RAM.

Hope this helps.

Man

This post has been edited 1 times, last edit by "Mantequilla" (Sep 18th 2017, 4:39pm)


Mantequilla

Beginner

Date of registration: Aug 16th 2017

Posts: 8

9

Wednesday, September 20th 2017, 2:54pm

Niklas,
The values loaded into Microsemi A2F200M3F external memory controller registers are:

EMC_MUX_CR = 0x00000001
EMC_CS_0_CR = 0x0020B335 - PSRAM
EMC_CS_1_CR = 0x0021D3BF - NOR Flash

You mentioned in a previous post that you loaded a project into A2F200M3F and SetRTTSearchRanges worked. Can I assume that RTT also worked without issues?
What demo board are you using? We have two different ones here and if one is same as you use I would like to test RTT on it.

We are counting on using RTT for a test fixture for our product and hope you can offer suggestion on what we may look into to make it work.

Any help is greatly appreciated!

Thanks,

Man

SEGGER - Niklas

Super Moderator

Date of registration: Oct 6th 2014

Posts: 1,691

10

Thursday, September 21st 2017, 10:56am

Hi Man,


Quoted

What demo board are you using?

I am using an Actel eval board from ~2010 with a A2F200M3F device.
The user guide is for a "SmartFusion Development Kit" / "A2F-DEV-KIT" and on the board itself it says "SFAD Board DVP-102-288-001 Rev B".

Quoted

EMC_MUX_CR = 0x00000001
EMC_CS_0_CR = 0x0020B335 - PSRAM
EMC_CS_1_CR = 0x0021D3BF - NOR Flash

Does not work on the board.
Please understand that I can not spend time on trying to figure out the init sequence of the PSRAM from the manual.


If I understand correctly there are two separate issues:
1)
When placing the RTT buffer in the PSRAM @ 0x70000000, neither auto-detection nor SetRTTSearchRanges works. However, when specifying the RTT address, it works without any issues.

2)
When debugging an application based on FreeRTOS, the same code that works on a MK10DX256xxx7 produce a hard fault after some time on the Microsemi A2F200M3.

Regarding 2)
Why is the SEGGER_RTT_MAX_INTERRUPT_PRIORITY define different from the version running on the MK10DX256xxx7 ?
We provide an Application Note (AN00016 Analyzing HardFaults on Cortex-M CPUs). It provides a .c file which can usually included in the project and is ready for use.
Does this help to isolate the source which is causing the issue?


Best regards,
Niklas
Would you like to be added to the J-Link software update notification list, so you get informed automatically when a new version becomes available?
Just write me a PM or in case you want to subscribe to it yourself, please use this link: Link
Notification for J-Link, J-Link Debugger, SystemView & J-Scope: Link
Notification for Embedded Studio: Link

Mantequilla

Beginner

Date of registration: Aug 16th 2017

Posts: 8

11

Monday, September 25th 2017, 4:46pm

Niklas,
Thank you for the suggestions.

Quoted

If I understand correctly there are two separate issues:

Yes, there are two problems but first one is easy to overcome by locating RTT buffer in on board RAM.

Quoted

Why is the SEGGER_RTT_MAX_INTERRUPT_PRIORITY define different from the version running on the MK10DX256xxx7 ?

I mis-printed the SEGGER_RTT_MAX_INTERRUPT_PRIORITY for Microsemi A2F200M3. It is the same as MK10DX256xxx7 and doesn't matter
so much if using FreeRTOS with 1 task and no other hardware interrupt except systimer.

Second problem cannot be resolved. RTT works fine on Microsemi A2F200M3 on simple program that continuously outputs test data to RTT console.
Same test code running in FreeRTOS task with no other tasks does not work.

I used Segger hardfault handler to look further. Hardfault is caused by access (not debug reason that I originally stated). Systick interrupt is always
active when hardfault occurs. For reasons unknown it is not possible to step out of hardfault handler to determine code location that caused
hardfault although it appears that it may be in FPGA fabric microcode.

I conclude that RTT issue is isolated to Microsemi A2F200M3 for reasons that only Microsemi would be able to determine.

We have found Microsemi A2F200M3 to be frustratingly idiosyncratic, Furthermore Microsemi lacks support that is common among virtually any other
microprocessor manufacturer.

Again, Thanks for suggestions.

Man