S3C6410 / J-Flash: How execute a set of assembly opcode while running the init seq. ?

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  • S3C6410 / J-Flash: How execute a set of assembly opcode while running the init seq. ?

    Hi,



    I am working with S3C6410+AM29LV080 now. The problem is I need to setup the peripheral scope for ARM1176JZF-S core before I can access any SFR (Bus width, Watch Dog, PLL and ...especially for DRAM controller).



    The opcode is like:



    LDR r0, =0x70000013 ;;;I can use "write register" macro to finish this :P ;;;

    MCR p15,0,r0,c15,c2,4 ;;;But how about this one :?: , seems there is a set of "Write JTAG IR" and "Write JTAG DR" may help, but I just don't know how to use it. ?( ;;;



    Seems the desciption of the help pdf is a little bit simple :pinch: . And anybody who help me, no matter if it is really helpful, will get a copy of S3C6410.jflash file with successful practice :thumbup: .



    Another thing is I got a failure ;( if I am trying to use stepstone as a buffer, not yet get the answer now. (Stepstone: 8KiB internal RAM buffer, Can be used as general purpose RAM if there is no NAND boot.)