Hello all,
I get "Trace HW not present" error on STM32H743 using J-Trace Debugger. With ST-Link V2 trace works correctly as expected. Trace with STM32F7 also worked fine for both Segger and ST-Link.
Any ideas?
- Marcus
Keil µVision 5.22
JLink info:
------------
DLL: V6.14b, compiled Mar 9 2017 08:46:04
Firmware: J-Trace Cortex-M Rev.3 compiled Dec 15 2016 14:46:47
Hardware: V3.10
S/N : 203200722
Feature(s) : RDI, FlashBP, FlashDL, JFlash, GDB
* JLink Info: Found SWD-DP with ID 0x6BA02477
* JLink Info: AP-IDR: 0x84770001, Type: AHB-AP
* JLink Info: AHB-AP ROM: 0xE00FE000 (Base addr. of first ROM table)
* JLink Info: Found Cortex-M7 r1p1, Little endian.
* JLink Info: FPUnit: 8 code (BP) slots and 0 literal slots
* JLink Info: CoreSight components:
* JLink Info: ROMTbl 0 @ E00FE000
* JLink Info: ROMTbl 0 [0]: 00001000, CID: B105100D, PID: 000BB4C7 ROM Table
* JLink Info: ROMTbl 1 @ E00FF000
* JLink Info: ROMTbl 1 [0]: FFF0F000, CID: B105E00D, PID: 000BB00C SCS
* JLink Info: ROMTbl 1 [1]: FFF02000, CID: B105E00D, PID: 000BB002 DWT
* JLink Info: ROMTbl 1 [2]: FFF03000, CID: B105E00D, PID: 000BB00E FPB
* JLink Info: ROMTbl 1 [3]: FFF01000, CID: B105E00D, PID: 000BB001 ITM
* JLink Info: ROMTbl 0 [1]: FFF43000, CID: B105900D, PID: 001BB975 ETM-M7
* JLink Info: ROMTbl 0 [2]: FFF45000, CID: B105900D, PID: 004BB906 ECT / CTI
* JLink Info: Cache: Separate I- and D-cache.
* JLink Info: I-Cache L1: 16 KB, 256 Sets, 32 Bytes/Line, 2-Way
* JLink Info: D-Cache L1: 16 KB, 128 Sets, 32 Bytes/Line, 4-Way
ROMTableAddr = 0xE00FE000
Target info:
------------
Device: STM32H743
VTarget = 3.416V
State of Pins:
TCK: 0, TDI: 1, TDO: 1, TMS: 1, TRES: 1, TRST: 0
Hardware-Breakpoints: 8
Software-Breakpoints: 8192
Watchpoints: 4
JTAG speed: 25000 kHz
Erase Done.
Programming Done.
Verify OK.
Application running ...
Flash Load finished at 14:02:24
Error: Target DLL has been cancelled. Debugger aborted !
I get "Trace HW not present" error on STM32H743 using J-Trace Debugger. With ST-Link V2 trace works correctly as expected. Trace with STM32F7 also worked fine for both Segger and ST-Link.
Any ideas?
- Marcus
Keil µVision 5.22
JLink info:
------------
DLL: V6.14b, compiled Mar 9 2017 08:46:04
Firmware: J-Trace Cortex-M Rev.3 compiled Dec 15 2016 14:46:47
Hardware: V3.10
S/N : 203200722
Feature(s) : RDI, FlashBP, FlashDL, JFlash, GDB
* JLink Info: Found SWD-DP with ID 0x6BA02477
* JLink Info: AP-IDR: 0x84770001, Type: AHB-AP
* JLink Info: AHB-AP ROM: 0xE00FE000 (Base addr. of first ROM table)
* JLink Info: Found Cortex-M7 r1p1, Little endian.
* JLink Info: FPUnit: 8 code (BP) slots and 0 literal slots
* JLink Info: CoreSight components:
* JLink Info: ROMTbl 0 @ E00FE000
* JLink Info: ROMTbl 0 [0]: 00001000, CID: B105100D, PID: 000BB4C7 ROM Table
* JLink Info: ROMTbl 1 @ E00FF000
* JLink Info: ROMTbl 1 [0]: FFF0F000, CID: B105E00D, PID: 000BB00C SCS
* JLink Info: ROMTbl 1 [1]: FFF02000, CID: B105E00D, PID: 000BB002 DWT
* JLink Info: ROMTbl 1 [2]: FFF03000, CID: B105E00D, PID: 000BB00E FPB
* JLink Info: ROMTbl 1 [3]: FFF01000, CID: B105E00D, PID: 000BB001 ITM
* JLink Info: ROMTbl 0 [1]: FFF43000, CID: B105900D, PID: 001BB975 ETM-M7
* JLink Info: ROMTbl 0 [2]: FFF45000, CID: B105900D, PID: 004BB906 ECT / CTI
* JLink Info: Cache: Separate I- and D-cache.
* JLink Info: I-Cache L1: 16 KB, 256 Sets, 32 Bytes/Line, 2-Way
* JLink Info: D-Cache L1: 16 KB, 128 Sets, 32 Bytes/Line, 4-Way
ROMTableAddr = 0xE00FE000
Target info:
------------
Device: STM32H743
VTarget = 3.416V
State of Pins:
TCK: 0, TDI: 1, TDO: 1, TMS: 1, TRES: 1, TRST: 0
Hardware-Breakpoints: 8
Software-Breakpoints: 8192
Watchpoints: 4
JTAG speed: 25000 kHz
Erase Done.
Programming Done.
Verify OK.
Application running ...
Flash Load finished at 14:02:24
Error: Target DLL has been cancelled. Debugger aborted !