Cortex-M0+ NVIC_SystemReset() does not reset MCU when Segger Jlink is connected

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  • Cortex-M0+ NVIC_SystemReset() does not reset MCU when Segger Jlink is connected

    Dear Segger,

    I am playing around with an Atmel Cortex-M0+ and a Jlink Segger-EDU.
    I found that (at least very often) the CMSIS NVIC_SystemReset() function does not reset the MCU when the Jlink is connected to the PCB. This even happens when the Jlink is only powered (by a USB Hub) but not connected to any PC (a Mac in my case). So there is no USB driver or gdb involved.

    Just the physical connection of a Jlink is influencing the correct execution of NVIC_SystemReset().

    This happens not always but reproducible quite often.

    Is this an intended feature or a limitation of the Jlink Segger-EDU?

    --------------

    Connecting to J-Link via USB...O.K.
    Firmware: J-Link V9 compiled Dec 16 2016 15:34:10
    Hardware version: V9.30
    S/N: ~~~~~~~~~~
    License(s): FlashBP, GDB
    OEM: SEGGER-EDU
    --------------

    regards


    spa

    The post was edited 2 times, last by spa ().

  • Hi Spa,


    we will try to reproduce this issue here.
    Can you provide us with an target application to reproduce this issue?
    If not, can you provide us with the source cod of the CMSIS NVIC_SystemReset() function?

    Could you please provide with the exact name of the Atmel Cortex-M0+ device?

    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Many thanks in advance to look into the issue.

    The NVIC_SystemReset() looks like:

    Source Code

    1. __STATIC_INLINE void NVIC_SystemReset(void)
    2. {
    3. __DSB(); /* Ensure all outstanding memory accesses included
    4. buffered write are completed before reset */
    5. SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) |
    6. SCB_AIRCR_SYSRESETREQ_Msk);
    7. __DSB(); /* Ensure completion of memory access */
    8. while(1); /* wait until reset */
    9. }


    I am using SAMD21G18A

    regards

    spa

  • Hi spa,


    thanks for providing the requested information.
    I will try to squeeze this in later today or tomorrow.


    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.