4.04a works ok, here is the log:

Application log started
- J-Flash ARM V4.04a (J-Flash compiled Apr 22 2009 09:58:31)
- JLinkARM.dll V4.04a (DLL compiled Apr 22 2009 09:57:51)
Reading flash device list [C:\Program Files\SEGGER\JLinkARM_V404a\ETC\JFlash\Flash.csv] ...
- List of flash devices read successfully (553 Devices)
Reading MCU device list [C:\Program Files\SEGGER\JLinkARM_V404a\ETC\JFlash\MCU.csv] ...
- List of MCU devices read successfully (317 Devices)
Opening project file [C:\Program Files\SEGGER\JLinkARM_V404a\Default.jflash] ...
- Project opened successfully
Connecting ...
- Connecting via USB to J-Link device 0
- J-Link firmware: V1.20 (J-Link compiled Jul 30 2008 11:24:37 ARM Rev.5)
- JTAG speed: 5 kHz (Fixed)
- Initializing CPU core (Init sequence) ...
- Initialized successfully
- JTAG speed: 200 kHz (Auto)
- J-Link found 2 JTAG devices. Core ID: 0x3BA00477 (Cortex-M3)
- Connected successfully


4.06
=====================
Application log started
- J-Flash ARM V4.06 (J-Flash compiled Jun 3 2009 15:07:05)
- JLinkARM.dll V4.06 (DLL compiled Jun 3 2009 15:06:21)
Reading flash device list [C:\Program Files\SEGGER\JLinkARM_V406\ETC\JFlash\Flash.csv] ...
- List of flash devices read successfully (576 Devices)
Reading MCU device list [C:\Program Files\SEGGER\JLinkARM_V406\ETC\JFlash\MCU.csv] ...
- List of MCU devices read successfully (337 Devices)
Creating new project file [C:\Program Files\SEGGER\JLinkARM_V406\Default.jflash] ...
- New project created successfully
Connecting ...
- Connecting via USB to J-Link device 0
- J-Link firmware: V1.20 (J-Link compiled Jul 30 2008 11:24:37 ARM Rev.5)
- JTAG speed: 5 kHz (Fixed)
- Initializing CPU core (Init sequence) ...
- ERROR: Failed to connect


===================================

I'm using an Olimex dev board.
Need help!!!

Thanks.

Hi Alex,

Thanks for your reply.

Just tried 4.09l, no success.
Please find an error message and a settings window among attachements.

I'm using default settings except changing a CPU type.

In addition, here is the log from IAR:

Thu Oct 01 14:58:34 2009: DLL version: V4.9i, compiled Sep 30 2009 19:42:15
Thu Oct 01 14:58:34 2009: Firmware: J-Link compiled Jul 30 2008 11:24:37 ARM Rev.5
Thu Oct 01 14:58:34 2009: JTAG speed is initially set to: 32 kHz
Thu Oct 01 14:58:34 2009: TotalIRLen = 9, IRPrint = 0x0011
Thu Oct 01 14:58:34 2009: Found Cortex-M3 r1p1, Little endian.
Thu Oct 01 14:58:34 2009: TPIU fitted.
Thu Oct 01 14:58:34 2009: ETM fitted.
Thu Oct 01 14:58:34 2009: FPUnit: 6 code (BP) slots and 2 literal slots
Thu Oct 01 14:58:34 2009: SYSRESETREQ has confused core. Trying to reconnect and use VECTRESET.
Thu Oct 01 14:58:37 2009: CPU did not halt, trying to disable WDT.
Thu Oct 01 14:58:37 2009: Core did not halt after reset, trying to disable WDT.
Thu Oct 01 14:58:40 2009: CPU did not halt, trying to disable WDT.
Thu Oct 01 14:58:40 2009: Core did not halt after reset, trying to disable WDT.
Thu Oct 01 14:58:43 2009: CPU did not halt, trying to disable WDT.
Thu Oct 01 14:58:46 2009: Fatal error: Bad JTAG communication: Write to IR: Expected 0x1, got 0xd (TAP Command : 14) @ Off 0x5. Wrong AHB ID (15:3). Expected 0x04770001 (Mask 0x0FFFFF0F), Found
0x00000000 Session aborted!
Thu Oct 01 14:58:46 2009: Failed to load debugee: D:\Projects\CanBox\Debug\Exe\CanBox.out

====
Please note, that the chip is fully erased trough 3.96, so WDT shouldn't be active.

Regards...
Eugene