[SOLVED] J-Trace thinks security bit is set

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  • [SOLVED] J-Trace thinks security bit is set

    After doing a full erase of the chip, I can program the flash without any warning. However, after programming, all other actions (connecting, reading, reprogramming, etc.) produce the warning that the security bits are set and wants me to do a full erase. I have read back and flash locations 40c and 40d (FOPT and FSEC) are set to FE and 3D respectively. This should set the flash security to 10 (unsecure).

    I have also tried using 0xFE3F to force boot from flash rather than using the bootcfg pin.

    My setup:
    J-TRACE (USB)
    Device: MKL17Z128XXX4

    Main question: what could cause the chip (or the software to think) to be in secure mode when I have selected the normal device (not secure) and have the security disabled in the FSEC flash location?

    Thank you,
    Peter Lieber
  • Hi Peter,

    The bin file generated by the IAR software sets all unwritten bytes to 00 instead of FF.

    I would suggest to use a .hex file instead of a .bin file, as the .bin format does not support gaps.
    This can be done in the IAR project settings:



    Best regards,
    Niklas
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