[SOLVED] I.MX6UL support in segger j-link probe

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  • [SOLVED] I.MX6UL support in segger j-link probe

    Hello Everyone,

    Would like to check that in which time frame segger is planning to provide the j-link probe firmware with i.mx6ul soc support.
    Currently we are facing some issues like
    - reset is not clean, some errors are thrown.
    - debugging linux kernel hangs the kernel.

  • Hi,

    We are not aware of any issues with J-Link and iMX6UL. We will try to squeeze this in within this week and update you about the progress.
    debugging linux kernel hangs the kernel.
    Would it be possible to provide us with a project / reproduction scenario?

    Best regards
    Erik
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Hello Erik,

    Sorry for the delayed response from my side.
    Glad to hear that you guys have started progress on it.

    Please find more details about the reset errors/warnings and kernel hang issue below.

    ------------------------------
    Reset errors/warnings.
    ------------------------------

    aarshad@aarshad-laptop:~/Work/Lennox/Lccd/Build_10052016/build_lccd$ /opt/SEGGER/JLink/JLinkExe

    SEGGER J-Link Commander V5.12e (Compiled Apr 29 2016 15:06:32)

    DLL version V5.12e, compiled Apr 29 2016 15:06:27



    Connecting to J-Link via USB...O.K.

    Firmware: J-Link V10 compiled Mar 29 2016 18:45:53

    Hardware version: V10.10

    S/N: 50100439

    License(s): GDB

    VTref = 3.309V





    Type "connect" to establish a target connection, '?' for help

    J-Link>device cortex-a7

    J-Link>connect

    Please specify target interface:

    J) JTAG (Default)

    S) SWD

    TIF>

    Device position in JTAG chain (IRPre,DRPre) <Default>: -1,-1 => Auto-detect

    JTAGConf>

    Specify target interface speed [kHz]. <Default>: 4000 kHz

    Speed>

    Device "CORTEX-A7" selected.





    TotalIRLen = 13, IRPrint = 0x0101



    **************************

    WARNING: At least one of the connected devices is not JTAG compliant (IEEE Std 1149.1, 7.1.1.d, IR-cells). (NumDevices = 3, NumBitsSet = 2)



    **************************



    ARM AP[0]: 0x74770001, AHB-AP

    ARM AP[1]: 0x44770002, APB-AP

    ROMTbl 0 [0]: 00001003, CID: B105900D, PID:04-001BB961 TMC

    ROMTbl 0 [1]: 00002003, CID: B105900D, PID:04-004BB906 ECT / CTI

    ROMTbl 0 [2]: 00003003, CID: B105900D, PID:04-004BB912 TPIU

    ROMTbl 0 [3]: 00004003, CID: B105F00D, PID:04-001BB101

    ROMTbl 0 [4]: 00020003, CID: B105100D, PID:04-000BB4A7 ROM Table

    ROMTbl 1 [0]: 00010003, CID: B105900D, PID:04-005BBC07 Cortex-A7

    Found Cortex-A7 r0p5

    6 code breakpoints, 4 data breakpoints

    Debug architecture ARMv7.1

    Data endian: little

    Main ID register: 0x410FC075

    I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way

    D-Cache L1: 32 KB, 128 Sets, 64 Bytes/Line, 4-Way

    Unified-Cache L2: 128 KB, 256 Sets, 64 Bytes/Line, 8-Way

    System control register:

    Instruction endian: little

    Level-1 instruction cache enabled

    Level-1 data cache disabled

    MMU disabled

    Branch prediction enabled

    Found 3 JTAG devices, Total IRLen = 13:

    #0 Id: 0x5BA00477, IRLen: 04, IRPrint: 0x1, CoreSight JTAG-DP (ARM)

    #1 Id: 0x00000001

    #2 Id: 0x0891D01D

    Cortex-A7 identified.

    J-Link>r

    Reset delay: 0 ms

    Reset type NORMAL: Toggle reset pin and halt CPU core.

    Cortex-A/R (reset): Re-initializing debug logic.



    **************************

    WARNING: CPU not halted after Reset, halting using Halt request

    **************************





    ****** Error: Bad JTAG communication: Write to IR: Expected 0x1, got 0xF (TAP Command : 10) @ Off 0x5.

    ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------


    ------------------------------
    Kernel hang issue.
    ------------------------------

    we are using linux kernel version 3.14.52 on i.mx6ul evk board.
    we have the following situation.



    1. JTAG is connected but no debug session is established.

    Result: kernel boot fine without any issue.



    2. JTAG is connected and debug session is established during the boot
    either while u-boot is executing or in the initialization of kernel.

    Result: kernel hangs [enters into some infinite loop], but JTAG debug session remains valid and if we step forward it shows that kernel is trying to launch the init process again and again.


    3. JTAG is connected and debug session is established after the kernel is booted correctly.

    Result: kernel hangs [enters into some infinite loop], but JTAG debug session remains valid and if we step forward it shows that kernel is trying to launch the init process again and again.

  • Hello aarshad

    The latest version of jlink software can support to debug our imx6ul evk board which run some barematel code, likely uboot and disable mmu？
    and you have any sucessfuly experience for this?

    Also my using the latest Jink software version is v6.10n

    Thanks!
    haozhijie

    The post was edited 1 time, last by zhjiehao ().

  • Hi,

    debugging should be possible when passing MCIMX6G2 , which is "official" part name by NXP (nxp.com/products/microcontrol…age_Quality_Tab) as a the device name.

    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Niklas，

    Thanks for your reply！

    I pass MCIMX6G2 as the device name at our jlink commander software， but debuging is also failed；

    Please help me and fix this bug， have any good comments？ Thanks！

    And debuging processing information as belows：



    SEGGER J-Link Commander V6.10l (Compiled Nov 7 2016 16:51:30)
    DLL version V6.10l, compiled Nov 7 2016 16:51:01

    Connecting to J-Link via USB...O.K.
    Firmware: J-Link V10 compiled Sep 1 2016 18:29:58
    Hardware version: V10.10
    S/N: 50100557
    License(s): GDB
    VTref = 0.000V


    Type "connect" to establish a target connection, '?' for help
    J-Link>connect
    Please specify device / core. <Default>: MCIMX6G2
    Type '?' for selection dialog
    Device>?
    Please specify target interface:
    J) JTAG (Default)
    S) SWD
    TIF>j
    Device position in JTAG chain (IRPre,DRPre) <Default>: -1,-1 => Auto-detect
    JTAGConf>
    Specify target interface speed [kHz]. <Default>: 4000 kHz
    Speed>1000
    Device "MCIMX6G2" selected.


    TotalIRLen = 13, IRPrint = 0x0101

    **************************
    WARNING: At least one of the connected devices is not JTAG compliant (IEEE Std 1149.1, 7.1.1.d, IR-cells). (NumDevices = 3, NumBitsSet = 2)

    **************************

    ARM AP[0]: 0x74770001, AHB-AP
    ARM AP[1]: 0x44770002, APB-AP
    ROMTbl 0 [0]: 00001003, CID: B105900D, PID:04-001BB961 TMC
    ROMTbl 0 [1]: 00002003, CID: B105900D, PID:04-004BB906 ECT / CTI
    ROMTbl 0 [2]: 00003003, CID: B105900D, PID:04-004BB912 TPIU
    ROMTbl 0 [3]: 00004003, CID: B105F00D, PID:04-001BB101
    ROMTbl 0 [4]: 00020003, CID: B105100D, PID:04-000BB4A7 ROM Table
    ROMTbl 1 [0]: 00010003, CID: B105900D, PID:04-005BBC07 Cortex-A7
    Found Cortex-A7 r0p5
    6 code breakpoints, 4 data breakpoints
    Debug architecture ARMv7.1
    Data endian: little
    Main ID register: 0x410FC075
    I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way
    D-Cache L1: 32 KB, 128 Sets, 64 Bytes/Line, 4-Way
    Unified-Cache L2: 128 KB, 256 Sets, 64 Bytes/Line, 8-Way
    System control register:
    Instruction endian: little
    Level-1 instruction cache enabled
    Level-1 data cache enabled
    MMU enabled
    Branch prediction enabled
    Found 3 JTAG devices, Total IRLen = 13:
    #0 Id: 0x5BA00477, IRLen: 04, IRPrint: 0x1, CoreSight JTAG-DP (ARM)
    #1 Id: 0x00000001
    #2 Id: 0x1891D01D
    Cortex-A7 identified.
    J-Link>r
    Reset delay: 0 ms
    Reset type NORMAL: Toggle reset pin and halt CPU core.
    Cortex-A/R (reset): Re-initializing debug logic.

    **************************
    WARNING: CPU not halted after Reset, halting using Halt request
    **************************


    ****** Error: Bad JTAG communication: Write to IR: Expected 0x1, got 0xF (TAP Command : 10) @ Off 0x5.

    J-Link>



    B.R

    zhijiehao

  • Hi,

    We are aware of this behavior. The iMX6UL requires some special handling to perform a proper reset. This is planned to be available in January 2017.

    - Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Hello Niklas,

    SEGGER - Niklas wrote:

    Hi,

    We are aware of this behavior. The iMX6UL requires some special handling to perform a proper reset. This is planned to be available in January 2017.

    - Niklas
    While trying to get the J-Link working with an i.MX6UL I stumbled into the same problems as the people in this thread.
    Additionally I witnessed something else:

    The provided software from segger.com/downloads/jlink behaves different on Windows and Linux.
    Using the Windows installation and the proposed device name "MCIMX6G2" leads to the following output:


    Windwos installation:

    Source Code

    1. J-Link>device mcimx6g2
    2. Disconnecting from J-Link...O.K.
    3. Device "MCIMX6G2" selected.
    6. TotalIRLen = 13, IRPrint = 0x0101
    8. **************************
    9. WARNING: At least one of the connected devices is not JTAG compliant (IEEE Std 1149.1, 7.1.1.d, IR-cells). (NumDevices = 3, NumBitsSet = 2)
    11. **************************
    13. ARM AP[0]: 0x74770001, AHB-AP
    14. ARM AP[1]: 0x44770002, APB-AP
    15. ROMTbl 0 [0]: 00001003, CID: B105900D, PID:04-001BB961 TMC
    16. ROMTbl 0 [1]: 00002003, CID: B105900D, PID:04-004BB906 ECT / CTI
    17. ROMTbl 0 [2]: 00003003, CID: B105900D, PID:04-004BB912 TPIU
    18. ROMTbl 0 [3]: 00004003, CID: B105F00D, PID:04-001BB101
    19. ROMTbl 0 [4]: 00020003, CID: B105100D, PID:04-000BB4A7 ROM Table
    20. ROMTbl 1 [0]: 00010003, CID: B105900D, PID:04-005BBC07 Cortex-A7
    21. Found Cortex-A7 r0p5
    22. 6 code breakpoints, 4 data breakpoints
    23. Debug architecture ARMv7.1
    24. Data endian: little
    25. Main ID register: 0x410FC075
    26. I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way
    27. D-Cache L1: 32 KB, 128 Sets, 64 Bytes/Line, 4-Way
    28. Unified-Cache L2: 128 KB, 256 Sets, 64 Bytes/Line, 8-Way
    29. System control register:
    30. Instruction endian: little
    31. Level-1 instruction cache enabled
    32. Level-1 data cache enabled
    33. MMU enabled
    34. Branch prediction enabled
    35. Found 3 JTAG devices, Total IRLen = 13:
    36. #0 Id: 0x5BA00477, IRLen: 04, IRPrint: 0x1, CoreSight JTAG-DP (ARM)
    37. #1 Id: 0x00000001
    38. #2 Id: 0x1891D01D
    39. Cortex-A7 identified.
    40. J-Link>
    Display All


    Linux installation:

    Source Code

    1. J-Link>device mcimx6g2
    2. J-Link>connect
    3. The selected device "MCIMX6G2" is unknown to this version of the J-Link software.
    5. Please make sure that at least the core J-Link shall connect to, is selected.
    6. Proper device selection is required to use the J-Link internal flash loaders
    7. for flash download or unlimited flash breakpoints.
    9. For some devices which require a special handling, selection of the correct device is important.
    10. No valid device has been selected.


    Is there any intended functional difference in the Windows and Linux implementation of the J-Link host tools?
    If that is the case it would be very beneficial to indicate this difference at some place (e.g. Releasenotes, Releaseline description or some sort of disclaimer). Linux developers prefer to develop in Linux and not Windows ;)
    Will there be a working support for i.MX6UL any time soon? This SoC is currently used in a lot of designs and is about to get the standard SoC for Linux based IoT stuff - so i guess supporting this SoC would be in your interest too.

    Target reset does neither work on Windows nor Linux.

    Best regards,
    Daniel

    The post was edited 2 times, last by dkustern ().

  • Hi Daniel,


    In general, the NXP i.MX6 / i.MX7 lineup is supported by the J-Link software: wiki.segger.com/IMX_Series_Devices

    Regarding reset:
    Unfortunately, a reset also resets the debug logic of the i.MX6UL and therefore is "broken by design" for debugging purposes.
    We will create a wiki article regarding this issue and describe possible workarounds after Embedded World 2017.

    Simplest workaround for now is to add a while(1) loop (or the like) at the start of the reset handler and manually step out of the loop after the J-Link is connected again.


    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Hello Niklas,

    Thank you for your quick reply.

    SEGGER - Niklas wrote:



    ...
    In general, the NXP i.MX6 / i.MX7 lineup is supported by the J-Link software: wiki.segger.com/IMX_Series_Devices

    Regarding reset:
    Unfortunately, a reset also resets the debug logic of the i.MX6UL and therefore is "broken by design" for debugging purposes.
    We will create a wiki article regarding this issue and describe possible workarounds after Embedded World 2017.

    Simplest workaround for now is to add a while(1) loop (or the like) at the start of the reset handler and manually step out of the loop after the J-Link is connected again.
    ...


    Okay, I will try this out - I am new to J-Link so I guess it will take some time to get such a workaround in place.

    Do you want to comment on the Windows Linux difference also?

    Best regards,
    Daniel

  • Hi Daniel,


    there should be no difference and I was unable to reproduce this issue on Win / macOS / Linux (Ubuntu 16.04.01 LTS).

    Does the "header" of J-Link Commander look like as follows?:
    SEGGER J-Link Commander V6.14b (Compiled Mar 9 2017 08:48:28)
    DLL version V6.14b, compiled Mar 9 2017 08:48:20

    Connecting to J-Link via USB...O.K.
    Firmware: J-Link ARM / Flasher ARM V4 compiled Mar 10 2017 14:51:25
    Hardware version: V4.00
    S/N: 1
    IP-Addr: DHCP (no addr. received yet)
    VTref = 0.000V


    Type "connect" to establish a target connection, '?' for help
    J-Link>


    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Hello Niklas,

    I would say the only difference should be the probe hardware.

    Source Code

    1. JLinkExe
    2. SEGGER J-Link Commander V6.14b (Compiled Mar 9 2017 08:48:28)
    3. DLL version V6.14b, compiled Mar 9 2017 08:48:20
    5. Connecting to J-Link via USB...O.K.
    6. Firmware: J-Link V9 compiled Dec 16 2016 15:34:10
    7. Hardware version: V9.40
    8. S/N: xxxxxx
    9. License(s): FlashBP, GDB
    10. OEM: SEGGER-EDU
    11. VTref = 3.370V
    14. Type "connect" to establish a target connection, '?' for help
    15. J-Link>device MCIMX6G2
    16. J-Link>connect
    17. Please specify target interface:
    18. J) JTAG (Default)
    19. S) SWD
    20. F) FINE
    21. I) ICSP
    22. C) C2
    23. TIF>j
    24. Device position in JTAG chain (IRPre,DRPre) <Default>: -1,-1 => Auto-detect
    25. JTAGConf>
    26. Specify target interface speed [kHz]. <Default>: 4000 kHz
    27. Speed>
    28. The selected device "MCIMX6G2" is unknown to this version of the J-Link software.
    30. Please make sure that at least the core J-Link shall connect to, is selected.
    31. Proper device selection is required to use the J-Link internal flash loaders
    32. for flash download or unlimited flash breakpoints.
    34. For some devices which require a special handling, selection of the correct device is important.
    35. No valid device has been selected.
    Display All


    I am running on CentOS 7.2 x64 64bit and installed from *.rpm.

    Best regards,
    Daniel

  • Hi Daniel,


    sorry for the delay in response.
    Could you please provide us with a J-Link log file from version 6.14b?

    How to enable J-Link log files is described in our wiki: wiki.segger.com/J-Link_DLL#Enable_J-Link_Log_File


    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Hello Niklas,

    I did the following:

    Source Code

    1. /opt/SEGGER/JLink/JLinkExe
    2. SEGGER J-Link Commander V6.14b (Compiled Mar 9 2017 08:48:28)
    3. DLL version V6.14b, compiled Mar 9 2017 08:48:20
    5. Connecting to J-Link via USB...O.K.
    6. Firmware: J-Link V9 compiled Dec 16 2016 15:34:10
    7. Hardware version: V9.40
    8. S/N: xxx
    9. License(s): FlashBP, GDB
    10. OEM: SEGGER-EDU
    11. VTref = 3.366V
    14. Type "connect" to establish a target connection, '?' for help
    15. J-Link>log segger.log
    16. J-Link>device mcimx6g2
    17. J-Link>connect
    18. Please specify target interface:
    19. J) JTAG (Default)
    20. S) SWD
    21. F) FINE
    22. I) ICSP
    23. C) C2
    24. TIF>j
    25. Device position in JTAG chain (IRPre,DRPre) <Default>: -1,-1 => Auto-detect
    26. JTAGConf>
    27. Specify target interface speed [kHz]. <Default>: 4000 kHz
    28. Speed>
    29. The selected device "MCIMX6G2" is unknown to this version of the J-Link software.
    31. Please make sure that at least the core J-Link shall connect to, is selected.
    32. Proper device selection is required to use the J-Link internal flash loaders
    33. for flash download or unlimited flash breakpoints.
    35. For some devices which require a special handling, selection of the correct device is important.
    36. No valid device has been selected.
    37. J-Link>q
    Display All


    And the logging output is as follows:

    Source Code

    1. $ cat segger.log
    3. T5F5B740 012:517 SEGGER J-Link V6.14b Log File (0000ms, 0025ms total)
    4. T5F5B740 012:517 DLL Compiled: Mar 9 2017 08:48:20 (0000ms, 0025ms total)
    5. T5F5B740 012:517 Logging started @ 2017-03-20 20:21 (0000ms, 0025ms total)
    6. T5F5B740 024:697 JLINK_DEVICE_GetIndex(sDeviceName = mcimx6g2) returns -1 (0390ms, 0415ms total)
    7. T5F5B740 028:358 JLINK_ConfigJTAG(IRPre = -1, DRPre = -1) (0000ms, 0415ms total)
    8. T5F5B740 029:273 JLINK_ExecCommand("device=mcimx6g2", ...). The selected device "MCIMX6G2" is unknown to this version of the J-Link software.
    10. Please make sure that at least the core J-Link shall connect to, is selected.
    11. Proper device selection is required to use the J-Link internal flash loaders
    12. for flash download or unlimited flash breakpoints.
    14. For some devices which require a special handling, selection of the correct device is important. returns 0xFFFFFFFF (0002ms, 0417ms total)
    15. T5F5B740 035:681 JLINK_IsOpen() returns 0x01 (0000ms, 0417ms total)
    16. T5F5B740 035:686 JLINK_Close() (0017ms, 0434ms total)
    17. T5F5B740 035:686 (0017ms, 0434ms total)
    18. T5F5B740 035:686 Closed (0017ms, 0434ms total)
    Display All

  • Hi Daniel,


    sorry for the delay in response.
    I am currently working on this and another Linux specific issue.
    We found the cause of this issue and already fixed it internally.
    I will try to provide you with a preliminary version that fixes both issues either later today or tomorrow.

    Either way, the fix will most certainly be included in the next beta version of the J-Link software & documentation pack (beta).

    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.

  • Hi Daniel,

    both issues are resolved in version 6.14c of the J-Link software & documentation pack.

    Best regards,
    Niklas
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/
    Or you can contact us via e-mail.