I have acquired an IMX6 SoloX board (A9 + M4 cores) from Embedded Artists and am trying to get the GDBServer to connect via a JLink Pro. The board is booting in Linux, but my initial interest is simply to start downloading test code into RAM onthe A9 core from CodeSourcery CodeBench. I am using the JLink scripts from this website and the latest GDBServer. I have 2 green lights on the JTAG device. When I initiate the connection, the GDBServer disconnects and the Linux OS reboots.

My web searches failed to turn up any hits. I would appreciate any insights and suggestions.

The GDBServer log content is:

SEGGER J-Link GDB Server V5.10c LogFile
Logging started @ 2015-12-09 14:40
03-00000000-00-00000000-001F: SEGGER J-Link GDB Server V5.10c
03-00000000-00-00000000-000C: GUI Version
03-00000000-00-00000000-0037: JLinkARM.dll V5.10c (DLL compiled Dec 4 2015 17:25:20)
03-00000000-00-00000001-0023: -----GDB Server start settings-----
03-00000000-00-00000001-0023: GDBInit file: none
03-00000000-00-00000001-0023: GDB Server Listening port: 2331
03-00000000-00-00000001-0023: SWO raw output listening port: 2332
03-00000000-00-00000001-0023: Terminal I/O port: 2333
03-00000000-00-00000001-002D: Accept remote connection: localhost only
03-00000000-00-00000001-0021: Generate logfile: on
03-00000000-00-00000001-0022: Verify download: off
03-00000000-00-00000001-0021: Init regs on start: on
03-00000000-00-00000001-0022: Silent mode: off
03-00000000-00-00000001-0022: Single run mode: off
03-00000000-00-00000001-0026: Target connection timeout: 5000 ms
03-00000000-00-00000001-0023: ------J-Link related settings------
03-00000000-00-00000001-0022: J-Link Host interface: USB
03-00000000-00-00000001-0045: J-Link script: iMX6SoloX_Connect_CortexA9.JLinkScript
03-00000000-00-00000001-0023: J-Link settings file: none
03-00000000-00-00000001-0023: ------Target related settings------
03-00000000-00-00000001-0028: Target device: Cortex-A9
03-00000000-00-00000001-0023: Target interface: JTAG
03-00000000-00-00000001-0023: Target interface speed: auto
03-00000000-00-00000001-0025: Target endian: little
03-00000000-00-00000002-0017: Connecting to J-Link...
02-00000000-00-00000008-003B: Firmware: J-Link ARM-Pro V1.x compiled Dec 3 2013 14:20:30
02-00000000-00-00000008-000F: Hardware: V1.10
02-00000000-00-00000008-000E: S/N: 171100131
02-00000000-00-00000268-0053: Feature(s): RDI, FlashBP, FlashDL, JFlash, GDB returns O.K. (0266ms, 0266ms total)
03-00000000-00-00000268-0014: J-Link is connected.
02-00000000-00-00000271-005F: T0E80 001:910 JLINK_ExecCommand("device = Cortex-A9", ...) returns 0x00 (0003ms, 0269ms total)
02-00000000-00-00000271-0068: T0E80 001:913 JLINK_ExecCommand("SetFlashRewriteBehavior = 1", ...) returns 0x00 (0000ms, 0269ms total)
02-00000000-00-00000273-0080: T0E80 001:914 JLINK_ExecCommand("ScriptFile = iMX6SoloX_Connect_CortexA9.JLinkScript", ...) returns 0x00 (0001ms, 0270ms total)
02-00000000-00-00000273-0041: T0E80 001:915 JLINK_GetFirmwareString(...) (0000ms, 0270ms total)
03-00000000-00-00000273-003B: Firmware: J-Link ARM-Pro V1.x compiled Dec 3 2013 14:20:30
02-00000000-00-00000273-004F: T0E80 001:915 JLINK_GetHardwareVersion() returns 0x2AF8 (0000ms, 0270ms total)
03-00000000-00-00000274-000F: Hardware: V1.10
03-00000000-00-00000274-000E: S/N: 171100131
03-00000000-00-00000274-002E: Feature(s): RDI, FlashBP, FlashDL, JFlash, GDB
02-00000000-00-00000274-0049: T0E80 001:916 JLINK_GetHWStatus(...) returns 0x00 (0000ms, 0271ms total)
02-00000000-00-00000275-003C: T0E80 001:917 JLINK_EnableSoftBPs(ON) (0000ms, 0272ms total)
03-00000000-00-00000275-001A: Checking target voltage...
03-00000000-00-00000275-0016: Target voltage: 3.10 V
03-00000000-00-00000275-001D: Listening on TCP/IP port 2331
03-00000000-00-00000275-0017: Connecting to target...
02-00000000-00-00000275-0035: T0E80 001:917 JLINK_ClrError() (0000ms, 0272ms total)
02-00000000-00-00000276-0049: T0E80 001:917 JLINK_GetHWStatus(...) returns 0x00 (0001ms, 0273ms total)
02-00000000-00-00000279-0056: T0E80 001:918 JLINK_TIF_Select(JLINKARM_TIF_JTAG) returns 0x00 (0003ms, 0276ms total)
03-00000000-00-00000288-0099: WARNING: Single device found in JTAG chain, but configuration has DRPost = 2, IRPost = 9. These values must be 0 for a single device and will be ignored.
02-00000000-00-00000288-01A1: T0E80 001:921 JLINK_SetSpeed(0)******************************************************J-Link script: iMX6 SoloX Cortex-A9 core J-Link script****************************************************** >0x48 JTAG> >0x2F8 JTAG>TotalIRLen = 5, IRPrint = 0x01 >0x30 JTAG> >0x210 JTAG>Single device found in JTAG chain, but configuration has DRPost = 2, IRPost = 9. These values must be 0 for a single device and will be ignored.
02-00000000-00-00000352-002E: ***** Error: CPU-TAP not found in JTAG chain
03-00000000-00-00000358-0099: WARNING: Single device found in JTAG chain, but configuration has DRPost = 2, IRPost = 9. These values must be 0 for a single device and will be ignored.
02-00000000-00-00000358-0182: ******************************************************J-Link script: iMX6 SoloX Cortex-A9 core J-Link script****************************************************** >0x48 JTAG> >0x2F8 JTAG>TotalIRLen = 5, IRPrint = 0x01 >0x30 JTAG> >0x210 JTAG>Single device found in JTAG chain, but configuration has DRPost = 2, IRPost = 9. These values must be 0 for a single device and will be ignored.
02-00000000-00-00000358-0045: ***** Error: CPU-TAP not found in JTAG chain (0079ms, 0355ms total)
03-00000000-00-00000358-0026: ERROR: CPU-TAP not found in JTAG chain
02-00000000-00-00000358-0044: T0E80 002:000 JLINK_GetSpeed() returns 0x3E8 (0000ms, 0355ms total)
02-00000000-00-00000358-0077: T0E80 002:000 JLINK_SetResetType(JLINKARM_RESET_TYPE_NORMAL) returns JLINKARM_RESET_TYPE_NORMAL (0000ms, 0355ms total)
02-00000000-00-00000358-003B: T0E80 002:000 JLINK_SetResetDelay(0) (0000ms, 0355ms total)
02-00000000-00-00000359-0055: T0E80 002:001 JLINK_SetEndian(ARM_ENDIAN_LITTLE) returns 0x00 (0000ms, 0356ms total)
03-00000000-00-00000368-0099: WARNING: Single device found in JTAG chain, but configuration has DRPost = 2, IRPost = 9. These values must be 0 for a single device and will be ignored.
02-00000000-00-00000368-019F: T0E80 002:001 JLINK_Connect()******************************************************J-Link script: iMX6 SoloX Cortex-A9 core J-Link script****************************************************** >0x48 JTAG> >0x2F8 JTAG>TotalIRLen = 5, IRPrint = 0x01 >0x30 JTAG> >0x210 JTAG>Single device found in JTAG chain, but configuration has DRPost = 2, IRPost = 9. These values must be 0 for a single device and will be ignored.
02-00000000-00-00000432-002E: ***** Error: CPU-TAP not found in JTAG chain
03-00000000-00-00000438-0099: WARNING: Single device found in JTAG chain, but configuration has DRPost = 2, IRPost = 9. These values must be 0 for a single device and will be ignored.
02-00000000-00-00000438-0182: ******************************************************J-Link script: iMX6 SoloX Cortex-A9 core J-Link script****************************************************** >0x48 JTAG> >0x2F8 JTAG>TotalIRLen = 5, IRPrint = 0x01 >0x30 JTAG> >0x210 JTAG>Single device found in JTAG chain, but configuration has DRPost = 2, IRPost = 9. These values must be 0 for a single device and will be ignored.
02-00000000-00-00000438-0059: ***** Error: CPU-TAP not found in JTAG chain returns 0xFFFFFEFB (0079ms, 0435ms total)
03-00000000-00-00000438-0026: ERROR: CPU-TAP not found in JTAG chain
03-00000000-00-00000438-0023: ERROR: Could not connect to target.
03-00000000-00-00000439-0035: Target connection failed. GDBServer will be closed...
02-00000000-00-00002402-0049: T10CC 004:044 JLINK_GetHWStatus(...) returns 0x00 (0000ms, 0435ms total)
03-00000000-00-00002449-0037: Restoring target state and closing J-Link connection...
02-00000000-00-00002449-0041: T0E80 004:091 JLINK_IsOpen() returns 0x01 (0000ms, 0435ms total)
02-00000000-00-00002449-0056: T0E80 004:091 JLINK_ExecCommand("ClrAllBPs", ...) returns 0x00 (0000ms, 0435ms total)
03-00000000-00-00002473-0010: Shutting down...

Thanks,
Brian

The product is the Embedded Artists imx6 SoloX SBC on a carrier board.

embeddedartists.com/products/kits/imx6solox_kit.php

The carrier board is at Rev A.

I cannot find any rev data on the SBC, nor do they provide a schematic. It is a failry new product, so i suspect the first revision still.

I would be happy to run any experiments you might suggest.


The output of the serial port at bootup is:

U-Boot 2014.04 (Sep 30 2015 - 18:42:53)

CPU: Freescale i.MX6SX rev1.2 at 792 MHz
CPU: Temperature 40 C, calibration data: 0x5a650169
Reset cause: POR
Board: Embedded Artists i.MX6 SoloX COM
00244, PA4, WO634
I2C: ready
DRAM: 1 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
*** Warning - bad CRC, using default environment

Display: Hannstar-XGA (1024x768)
Video: 1024x768x18
gis input --- No input
In: serial
Out: serial
Err: serial
Found PFUZE200! deviceid 0x1, revid 0x21
mmc1(part 0) is current device
Net: FEC0
Normal Boot
Hit any key to stop autoboot: 0
mmc1(part 0) is current device
reading boot.scr
** Unable to read file boot.scr **
reading zImage
6083888 bytes read in 205 ms (28.3 MiB/s)
Booting from mmc ...
reading imx6sxea-com-kit.dtb
42936 bytes read in 20 ms (2 MiB/s)
Kernel image @ 0x80800000 [ 0x000000 - 0x5cd530 ]
## Flattened Device Tree blob at 83000000
Booting using the fdt blob at 0x83000000
Using Device Tree in place at 83000000, end 8300d7b7
switch to ldo_bypass mode!

Starting kernel ...

Booting Linux on physical CPU 0x0
Linux version 3.14.28-1.0.0_ga+g91cf351 (jenkins@umbriel) (gcc version 4.9.1 (GCC) ) #1 SMP PREEMPT Mon Oct 19 12:29:50 CEST 2015
CPU: ARMv7 Processor [412fc09a] revision 10 (ARMv7), cr=10c53c7d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine model: Embedded Artists i.MX6 SoloX COM Kit
cma: CMA: reserved 320 MiB at ac000000
Memory policy: Data cache writealloc
PERCPU: Embedded 8 pages/cpu @ab73a000 s8896 r8192 d15680 u32768
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 260096
Kernel command line: console=ttymxc0,115200 root=/dev/mmcblk2p2 rootwait rw
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Memory: 696276K/1048576K available (7387K kernel code, 399K rwdata, 6232K rodata, 336K init, 430K bss, 352300K reserved, 0K highmem)
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
vmalloc : 0xc0800000 - 0xff000000 (1000 MB)
lowmem : 0x80000000 - 0xc0000000 (1024 MB)
pkmap : 0x7fe00000 - 0x80000000 ( 2 MB)
modules : 0x7f000000 - 0x7fe00000 ( 14 MB)
.text : 0x80008000 - 0x80d551e8 (13621 kB)
.init : 0x80d56000 - 0x80daa2c0 ( 337 kB)
.data : 0x80dac000 - 0x80e0fd40 ( 400 kB)
.bss : 0x80e0fd4c - 0x80e7b684 ( 431 kB)
SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
Preemptible hierarchical RCU implementation.
RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=1.
RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
NR_IRQS:16 nr_irqs:16 16
L310 cache controller enabled
l2x0: 16 ways, CACHE_ID 0x410000c8, AUX_CTRL 0x32030000, Cache size: 256 kB
Switching to timer-based delay loop
sched_clock: 32 bits at 3000kHz, resolution 333ns, wraps every 1431655765682ns
clocksource_of_init: no matching clocksources found
Console: colour dummy device 80x30
Calibrating delay loop (skipped), value calculated using timer frequency.. 6.00 BogoMIPS (lpj=30000)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
CPU: Testing write buffer coherency: ok
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Setting up static identity map for 0x80707d98 - 0x80707df0
Brought up 1 CPUs
SMP: Total of 1 processors activated.
CPU: All CPU(s) started in SVC mode.
devtmpfs: initialized
VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
pinctrl core: initialized pinctrl subsystem
regulator-dummy: no parameters
NET: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic coherent allocations
cpuidle: using governor ladder
cpuidle: using governor menu
Use WDOG1 as reset source
syscon 20c8000.anatop: regmap [mem 0x020c8000-0x020c8fff] registered
vdd1p1: 800 <--> 1375 mV at 1100 mV
vdd3p0: 2800 <--> 3150 mV at 3000 mV
vdd2p5: 2100 <--> 2875 mV at 2500 mV
cpu: 725 <--> 1450 mV
vddpcie-phy: 725 <--> 1450 mV
vddsoc: 725 <--> 1450 mV
syscon 20e4000.iomuxc-gpr: regmap [mem 0x020e4000-0x020e7fff] registered
syscon 21bc000.ocotp-ctrl: regmap [mem 0x021bc000-0x021bffff] registered
syscon 21ac000.romcp: regmap [mem 0x021ac000-0x021affff] registered
hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
hw-breakpoint: maximum watchpoint size is 4 bytes.
imx6sx-pinctrl 20e0000.iomuxc: initialized IMX pinctrl driver
20dc000.gpc supply pu not found, using dummy regulator
MU is ready for cross core communication!
bio: create slab <bio-0> at 0
mxs-dma 1804000.dma-apbh: initialized
vref-3v3: 3300 mV
lcd-3v3: no parameters
VCC_SD2: 3000 mV
PSU-5V0: 5000 mV
usb_otg1_vbus: 5000 mV
usb_otg2_vbus: 5000 mV
MPCIE_3V3: 3300 mV
vgaarb: loaded
i2c-core: driver [max17135] using legacy suspend method
i2c-core: driver [max17135] using legacy resume method
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
usbphy_nop1.12 supply vcc not found, using dummy regulator
i2c i2c-0: IMX I2C adapter registered
i2c i2c-1: IMX I2C adapter registered
i2c i2c-2: IMX I2C adapter registered
.....

Some additional info...

I am using a "standard" 20 pin ribbon cable. The jtag debugger is a JLink Pro.

I have queried the embedded Artists folks as well. Their initial suggestions was:

I
think the problem is the JLINK script. It most likely pull the reset signal
when it connects.


Many IDEs let you configure how the debug interface connects to the processor,
with our without pulling the reset signal.

I am only trying to connect the A9 core (not the M4). My initial goal is to download some code into RAM so i can port an RTOS to the A9. So i don't care
if the M4 is active or not.