Hi all,
This is my first post on this forum. I have some basic knowledge about ARM programming (Atmel SAM4s Expained Pro board). I'm now upgrading to a more performant system (Cortex A8 on Beaglebone black). I can compile & link my bare metal C/C++ code (GNU arm-none-eabi toolchain). I can run/debug programs in the SoC's ram. The board has an 512MB external RAM memory. The problem is that this RAM must be enabled by the Cortex before it can be used. This means that any code linked into that memory area wil not load by JTAG because the memory isn't configured after the J-Link resets the system. How can I work around this, is it possible to let the J-Link upload the initialisation code, execute this code so that the DDR3 memory becomes usable, and then continu to upload the code to the DDR3 area before transferring control to the DDR3-code ?
Thanks for any suggestions.
Paul
This is my first post on this forum. I have some basic knowledge about ARM programming (Atmel SAM4s Expained Pro board). I'm now upgrading to a more performant system (Cortex A8 on Beaglebone black). I can compile & link my bare metal C/C++ code (GNU arm-none-eabi toolchain). I can run/debug programs in the SoC's ram. The board has an 512MB external RAM memory. The problem is that this RAM must be enabled by the Cortex before it can be used. This means that any code linked into that memory area wil not load by JTAG because the memory isn't configured after the J-Link resets the system. How can I work around this, is it possible to let the J-Link upload the initialisation code, execute this code so that the DDR3 memory becomes usable, and then continu to upload the code to the DDR3 area before transferring control to the DDR3-code ?
Thanks for any suggestions.
Paul