[SOLVED]STM32L0 Debugging in Low-Power modes

This site uses cookies. By continuing to browse this site, you are agreeing to our Cookie Policy.

  • [SOLVED]STM32L0 Debugging in Low-Power modes

    Hi,

    it seems that the J-Link with the latest version 4.90 has problems connecting to the core if low-power modes are used.
    I am just using SLEEP mode (with MAIN regulator on, WFI) in the FreeRTOS IDLE sleep.

    However, the ST-Linkv2 does not show this behaviour. It can connect in all modes.

    I am just using the SWD interface signals SWDIO/SWDCLK (plus VTre and GND) for the connection between the STM32L052K8 and the J-Link / ST-Linkv2.
    The reset line (NRST) of the MCU is not connected to the debugger.

    The only thing that helps is to immediately start the debugger if the MCU core is in RUN mode. Then J-Link can connect to the core.

    I have tried reset type 0 and 3 where 3 does not make sense probably, because the reset line is not connected, right?

    So is this a problem of the missing connection for reset or is it a J-Link problem?
    (If the missing reset connection would be the reason, then why does ST-Linkv2 work? It is also configured to "connect under reset".)

    Thanks,
    Christian
  • Hi,

    it seems that the J-Link with the latest version 4.90 has problems connecting to the core if low-power modes are used.

    What makes you thinking that it is related to V4.90?
    Did it work before?
    Did you ever try it with another version than V4.90?
    From your post it reads like it was working before and stopped working with V4.90.

    (If the missing reset connection would be the reason, then why does ST-Linkv2 work? It is also configured to "connect under reset".)

    Connect under reset requires the nRESET line being connected. Otherwise it does not work.
    No matter what probe you use.
    The ST devices have special configuration bits that can be set to avoid turning off some clocks which are necessary for debugging.
    But for setting these bits, the debug probe must be able to establish a connection to the device.
    If it already is in a low-power mode and has switched off the clocks, the connect under reset (which requires the nRESET line to be connected!) is the only way to regain control over the device.
    Of course, if your timing is good and you try to establish a connection within a timeframe where the CPU currently woke up from WFI, you can also connect.
    But for most applications, the CPU will be in low-power mode for > 95% of the time.

    We can give it a try here with J-Link and ST-Linkv2 but I am *pretty* sure that it won't work with STLink either, if nRESET is not connected.


    - Alex
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hi Alex,

    sorry for the confusion about the version. 4.90 was the first version that ever worked with the STM32L052K8 here.
    I have worked with the ST-LinkV2 in the mean time.

    The nRST of the STM32L052K8 was not connected to the debug interface.
    I have soldered a connection between nRST (at the MCU) and nRESET(Pin15 J-Link).

    The problem still exists with the J-Link. The ST-Linkv2 can connect without any problem. (And strangely it could also connect before the reset connection was there.)
    Both are configured to "connect under reset" which means reset type 3 for the J-Link.

    I am aware of the bits DBGMCU_STOP, DBGMCU_SLEEP and DBGMCU_STANDY.
    Before entering SLEEP I call this:

    C Source Code

    1. HAL_EnableDBGSleepMode();
    2. /* --- */
    3. void HAL_EnableDBGSleepMode(void)
    4. {
    5. SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
    6. }


    But it does not help.

    If I got a connection to the MCU, debugging using GDB server works without any problems. However, it is the first connect that does not seem to work properly.
  • Hi,

    Thanks for the update.
    We are currently investigating this and check if we can reproduce.
    Maybe something has changed for the L0-series regarding connect under reset.
    They are fairly new compared to the other STM32 series devices...

    Keep you posted.


    - Alex
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Sleep mode is entered in this way:

    C Source Code

    1. HAL_PWR_EnterSLEEPMode( PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI);


    No special PRE/POST handling of other stuff.

    I am using the internal HSI16 oscillator.

    C Source Code

    1. static void SystemClock_Config(void)
    2. {
    3. RCC_ClkInitTypeDef RCC_ClkInitStruct;
    4. RCC_OscInitTypeDef RCC_OscInitStruct;
    5. /* Enable Power Control clock */
    6. __PWR_CLK_ENABLE();
    7. /* The voltage scaling allows optimizing the power consumption when the device is
    8. clocked below the maximum system frequency, to update the voltage scaling value
    9. regarding system frequency refer to product datasheet. */
    10. __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
    11. /* Enable HSI Oscillator */
    12. RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
    13. RCC_OscInitStruct.HSIState = RCC_HSI_ON;
    14. RCC_OscInitStruct.HSICalibrationValue = 16;
    15. RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
    16. assert_param(HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK);
    17. /* Select HSI as system clock source and configure the HCLK, PCLK1 and PCLK2
    18. clocks dividers */
    19. RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
    20. RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
    21. RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
    22. RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
    23. RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
    24. assert_param(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) == HAL_OK);
    25. }
    Display All


    If I reconfigure FreeRTOS to not use tickless-mode (no SLEEP mode when idle), then the J-Link works without any problems.
  • Hi,

    I think we have found the problem.
    The STM32L0 indeed behaves somewhat different to other STM32 devices and allows in SLEEP mode (and only in sleep mode, not in stop mode etc.) a method of "connect under reset" without having the need of nRESET being connected.
    We plan a new version (V4.90a) this week, anyhow. We will include this improvement in V4.90a.
    Thanks for letting us know.


    - Alex
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hi,

    the release of v4.90a is planned for later today.


    Erik
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hi, The new version has been delayed another 1-2 days due to some work needed to be done on other modules. We recommend to subscribe to the J-Link software update notification list, so you get informed immediately, when the new version becomes available: segger.com/notification/subscribe.php?prodid=7 Sorry again for the delay. - Alex
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Hi,

    V4.90b is available for download:<br>
    segger.com/jlink-software.html<br>


    - Alex
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.
  • Thanks for the info.

    v4.90a is running without any problems at the moment. So I do not touch it or is there anything related to the STM32L0 in v4.90b? According to the changelog it does not seem to be the case.
  • Hi,

    No, V4.90a should be fine for you.
    Just noticed that this thread was unanswered even though the version was already available.
    I will close it then.

    - Alex
    Please read the forum rules before posting.

    Keep in mind, this is *not* a support forum.
    Our engineers will try to answer your questions between their projects if possible but this can be delayed by longer periods of time.
    Should you be entitled to support you can contact us via our support system: segger.com/ticket/

    Or you can contact us via e-mail.