Hi,
it seems that the J-Link with the latest version 4.90 has problems connecting to the core if low-power modes are used.
I am just using SLEEP mode (with MAIN regulator on, WFI) in the FreeRTOS IDLE sleep.
However, the ST-Linkv2 does not show this behaviour. It can connect in all modes.
I am just using the SWD interface signals SWDIO/SWDCLK (plus VTre and GND) for the connection between the STM32L052K8 and the J-Link / ST-Linkv2.
The reset line (NRST) of the MCU is not connected to the debugger.
The only thing that helps is to immediately start the debugger if the MCU core is in RUN mode. Then J-Link can connect to the core.
I have tried reset type 0 and 3 where 3 does not make sense probably, because the reset line is not connected, right?
So is this a problem of the missing connection for reset or is it a J-Link problem?
(If the missing reset connection would be the reason, then why does ST-Linkv2 work? It is also configured to "connect under reset".)
Thanks,
Christian
it seems that the J-Link with the latest version 4.90 has problems connecting to the core if low-power modes are used.
I am just using SLEEP mode (with MAIN regulator on, WFI) in the FreeRTOS IDLE sleep.
However, the ST-Linkv2 does not show this behaviour. It can connect in all modes.
I am just using the SWD interface signals SWDIO/SWDCLK (plus VTre and GND) for the connection between the STM32L052K8 and the J-Link / ST-Linkv2.
The reset line (NRST) of the MCU is not connected to the debugger.
The only thing that helps is to immediately start the debugger if the MCU core is in RUN mode. Then J-Link can connect to the core.
I have tried reset type 0 and 3 where 3 does not make sense probably, because the reset line is not connected, right?
So is this a problem of the missing connection for reset or is it a J-Link problem?
(If the missing reset connection would be the reason, then why does ST-Linkv2 work? It is also configured to "connect under reset".)
Thanks,
Christian