Bad JTAG communication. Unable to halt CPU core

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  • Bad JTAG communication. Unable to halt CPU core

    I am using the J-Link to debug a SM470R1B1M from TI. Until recently I had no problems the J-Link was working great to debug my project. Recently I have run into problems. I can download my code into flash but I get the following error.

    Bad JTAG communications: Write to IR: Expected 0x1, got 0x0 (TAP Command : 2) @ Off 0x5. Unable to halt CPU core.

    If I reset the board after the error the new code has been programmed and the system will run. I can no longer debug the system using the J-Link.

    I logged the J-Link communications and attached the file.
    Files
    • cspycomm.txt

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