Hi,
I would like to ask about help with programming external flash issue.
Please see attachment! There is a mail with pictures for J-Link/J-Flash/schematic.
I would like to describe my problem below:
[SETUP]
1. J-Link Plus : HW v10.1, 16-36 (YY – WW), V6.30b;
2. J-Link Base : HW v8.0, 10-04 (YY – WW), V6.30b;
3. J-Flash - SW V6.30b / J-Link commander - V6.30b;
4. J-Flash - SW V6.20e / J-Link commander - V6.20e;
5. NXP LPC1853
6. WINBOND W25Q128FV – Serial flash memory (DUAL/QUAD SPI)
7. Keil uVision for ARM
[PROBLEM]
We are programming our PCBs since 2016 with J-Link (at first with v8.0 version and SW v.5.X).
Now we have also the newest J-Link and firmware for that (1. and 2.).
We programed it more than thousand times (with 3. and 4. and older versions). In 99,5% with success. But sometimes some strange error occur.
Sometimes during programming process, J-Link can not program external flash (6.).
There is problem with access to data block – block verification error (see attachment).
Sometimes it is not a start address of external flash memory but a hundreds bytes later.
[OUR TEMPORARY SOLUTION]
Before we used J-Flash or J-Link commander, we had used Keil to program our PCB (with external flash memory algorithm for winbond).
To “fix” our flash, we have to erase flash by Keil with flash algorithm written by us (.FLM). Very often it doesn’t work for the first time.
HOW KEIL WORKS : Keil is programming internal NXP memory, and after that, step by step it is coping data from internal memory to external (in the meantime NXP gets new part of data).
After that, we have access to flash again, and now programming with SEGGER tools and J-Link is possible.
We tried to reduce programming speed. It doesn’t work.
[QUESITIONS]
Could you help us? Do you have any idea what is wrong with our programming procedure?
It might be a SW/firmware problem, or rather our HW?
We will be glad for any help.
Programming external flash memory issue.pdf
DCWR
I would like to ask about help with programming external flash issue.
Please see attachment! There is a mail with pictures for J-Link/J-Flash/schematic.
I would like to describe my problem below:
[SETUP]
1. J-Link Plus : HW v10.1, 16-36 (YY – WW), V6.30b;
2. J-Link Base : HW v8.0, 10-04 (YY – WW), V6.30b;
3. J-Flash - SW V6.30b / J-Link commander - V6.30b;
4. J-Flash - SW V6.20e / J-Link commander - V6.20e;
5. NXP LPC1853
6. WINBOND W25Q128FV – Serial flash memory (DUAL/QUAD SPI)
7. Keil uVision for ARM
[PROBLEM]
We are programming our PCBs since 2016 with J-Link (at first with v8.0 version and SW v.5.X).
Now we have also the newest J-Link and firmware for that (1. and 2.).
We programed it more than thousand times (with 3. and 4. and older versions). In 99,5% with success. But sometimes some strange error occur.
Sometimes during programming process, J-Link can not program external flash (6.).
There is problem with access to data block – block verification error (see attachment).
Sometimes it is not a start address of external flash memory but a hundreds bytes later.
[OUR TEMPORARY SOLUTION]
Before we used J-Flash or J-Link commander, we had used Keil to program our PCB (with external flash memory algorithm for winbond).
To “fix” our flash, we have to erase flash by Keil with flash algorithm written by us (.FLM). Very often it doesn’t work for the first time.
HOW KEIL WORKS : Keil is programming internal NXP memory, and after that, step by step it is coping data from internal memory to external (in the meantime NXP gets new part of data).
After that, we have access to flash again, and now programming with SEGGER tools and J-Link is possible.
We tried to reduce programming speed. It doesn’t work.
[QUESITIONS]
Could you help us? Do you have any idea what is wrong with our programming procedure?
It might be a SW/firmware problem, or rather our HW?
We will be glad for any help.
Programming external flash memory issue.pdf
DCWR